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    MULTILAYER PATTERN TRANSFER FOR CHEMICAL GUIDES
    11.
    发明申请
    MULTILAYER PATTERN TRANSFER FOR CHEMICAL GUIDES 有权
    化学指南的多层图案转移

    公开(公告)号：US20140252660A1

    公开(公告)日：2014-09-11

    申请号：US13787090

    申请日：2013-03-06

    Applicant: GLOBALFOUNDRIES INC.

    Inventor： Richard A. Farrell ,  Gerard M. Schmid ,  Sudharshanan Raghunathan

    IPC: H01L21/311 ,  H01L23/00

    CPC classification number: H01L23/564 ,  H01L21/3086 ,  H01L21/311 ,  H01L21/31144 ,  H01L21/67109 ,  H01L21/6831 ,  H01L21/76807 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Approaches for multilayer pattern transfer for chemical guides are provided. In a typical embodiment, a device is formed by forming an etch mask layer (e.g., a nitride layer and an oxide layer) over a substrate (e.g., silicon (Si)). An orientation control layer (e.g., a neutral layer) is then formed over the etch mask layer, and an ARC layer (e.g., SiARC) is formed over the orientation control layer. In other embodiments, an organic planarization layer (OPL) and/or a protection layer may also be formed between the ARC layer and the orientation control layer. Regardless, a tapered etch profile/pattern may then be formed through the ARC and/or other layers.

    Abstract translation: 提供了用于化学导轨的多层图案转印的方法。 在典型的实施例中，通过在衬底（例如，硅（Si））上形成蚀刻掩模层（例如，氮化物层和氧化物层）来形成器件。 然后在蚀刻掩模层上形成取向控制层（例如中性层），并且在取向控制层上形成ARC层（例如SiARC）。 在其它实施例中，也可以在ARC层和取向控制层之间形成有机平坦化层（OPL）和/或保护层。 无论如何，可以通过ARC和/或其他层形成锥形蚀刻轮廓/图案。

    Methods of forming a masking layer for patterning underlying structures
    15.
    发明授权
    Methods of forming a masking layer for patterning underlying structures 有权
    形成用于图案化底层结构的掩模层的方法

    公开(公告)号：US08969207B2

    公开(公告)日：2015-03-03

    申请号：US13798690

    申请日：2013-03-13

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Gerard M. Schmid ,  Jeremy A. Wahl ,  Richard A. Farrell ,  Chanro Park

    IPC: H01L21/311 ,  H01L23/48 ,  H01L21/308

    CPC classification number: H01L21/31144 ,  H01L21/0337 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76816

    Abstract: One illustrative method disclosed herein includes forming a patterned hard mask layer comprised of a plurality of discrete openings above a structure, wherein the patterned hard mask layer is comprised of a plurality of intersecting line-type features, forming a patterned etch mask above the patterned hard mask layer that exposes at least one, but not all, of the plurality of discrete openings, and performing at least one etching process through the patterned etch mask and the at least one exposed opening in the patterned hard mask layer to define an opening in the structure.

    Abstract translation: 本文公开的一种说明性方法包括形成由结构上方的多个离散开口组成的图案化的硬掩模层，其中所述图案化的硬掩模层由多个相交的线型特征组成，在图案化硬的上方形成图案化的蚀刻掩模 掩模层，其暴露多个离散开口中的至少一个但不是全部，并且通过图案化的蚀刻掩模和图案化的硬掩模层中的至少一个暴露的开口进行至少一个蚀刻工艺，以在 结构体。

    Methods for fabricating integrated circuits including formation of chemical guide patterns for directed self-assembly lithography
    16.
    发明授权
    Methods for fabricating integrated circuits including formation of chemical guide patterns for directed self-assembly lithography 有权
    用于制造集成电路的方法，包括形成用于定向自组装光刻的化学引导图案

    公开(公告)号：US08853101B1

    公开(公告)日：2014-10-07

    申请号：US13841694

    申请日：2013-03-15

    Applicant: GLOBALFOUNDRIES, Inc.

    Inventor： Richard A. Farrell ,  Gerard M. Schmid ,  xU Ji

    IPC: H01L21/31 ,  H01L21/469 ,  H01L21/033

    CPC classification number: H01L21/0337 ,  B81C1/00031 ,  B81C2201/0149 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/0271 ,  H01L21/0276

    Abstract: Methods for creating chemical guide patterns by DSA lithography for fabricating an integrated circuit are provided. In one example, an integrated circuit includes forming a bifunctional brush layer of a polymeric material overlying an anti-reflective coating on a semiconductor substrate. The polymeric material has a neutral polymeric block portion and a pinning polymeric block portion that are coupled together. The bifunctional brush layer includes a neutral layer that is formed of the neutral polymeric block portion and a pinning layer that is formed of the pinning polymeric block portion. A portion of the neutral layer or the pinning layer is selectively removed to define a chemical guide pattern. A block copolymer layer is deposited overlying the chemical guide pattern. The block copolymer layer is phase separated to define a nanopattern that is registered to the chemical guide pattern.

    Abstract translation: 提供了通过DSA光刻产生化学引导图案以制造集成电路的方法。 在一个示例中，集成电路包括形成覆盖半导体衬底上的抗反射涂层的聚合材料的双功能刷层。 聚合物材料具有中性聚合物嵌段部分和联结在一起的钉扎聚合物嵌段部分。 双功能刷层包括由中性聚合物嵌段部分形成的中性层和由钉扎聚合物嵌段部分形成的钉扎层。 选择性地去除中性层或钉扎层的一部分以限定化学引导图案。 沉积在化学引导图案上的嵌段共聚物层。 嵌段共聚物层被相分离以限定与化学引导图案对应的纳米图案。

    METHODS OF FORMING A MASKING LAYER FOR PATTERNING UNDERLYING STRUCTURES
    17.
    发明申请
    METHODS OF FORMING A MASKING LAYER FOR PATTERNING UNDERLYING STRUCTURES 有权
    形成掩蔽层的方法，用于绘制基础结构

    公开(公告)号：US20140273473A1

    公开(公告)日：2014-09-18

    申请号：US13798690

    申请日：2013-03-13

    Applicant: GLOBALFOUNDRIES INC.

    Inventor： Gerard M. Schmid ,  Jeremy A. Wahl ,  Richard A. Farrell ,  Chanro Park

    IPC: H01L21/308

    CPC classification number: H01L21/31144 ,  H01L21/0337 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76816

    Abstract: One illustrative method disclosed herein includes forming a patterned hard mask layer comprised of a plurality of discrete openings above a structure, wherein the patterned hard mask layer is comprised of a plurality of intersecting line-type features, forming a patterned etch mask above the patterned hard mask layer that exposes at least one, but not all, of the plurality of discrete openings, and performing at least one etching process through the patterned etch mask and the at least one exposed opening in the patterned hard mask layer to define an opening in the structure.

    Abstract translation: 本文公开的一种说明性方法包括形成由结构上方的多个离散开口组成的图案化的硬掩模层，其中所述图案化的硬掩模层由多个相交的线型特征组成，在图案化硬的上方形成图案化的蚀刻掩模 掩模层，其暴露多个离散开口中的至少一个但不是全部，并且通过图案化的蚀刻掩模和图案化的硬掩模层中的至少一个暴露的开口进行至少一个蚀刻工艺，以在 结构体。

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