公开(公告)号：US09349649B2

公开(公告)日：2016-05-24

申请号：US14315844

申请日：2014-06-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Kevin K. Chan ,  Yue Ke ,  Annie Levesque ,  Dae-Gyu Park ,  Ravikumar Ramachandran ,  Amanda L. Tessier ,  Min Yang

IPC: H01L21/8234 ,  H01L29/78 ,  H01L21/02 ,  H01L21/285 ,  H01L29/66 ,  H01L21/223 ,  H01L21/265 ,  H01L27/088 ,  H01L29/08 ,  H01L21/84 ,  H01L27/12

CPC classification number: H01L21/823431 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/223 ,  H01L21/2236 ,  H01L21/26566 ,  H01L21/28518 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/7853

Abstract: A gate structure is formed straddling a first portion of a plurality of semiconductor fins that extend upwards from a topmost surface of an insulator layer. A dielectric spacer is formed on sidewalls of the gate structure and straddling a second portion of the plurality of semiconductor fins. Epitaxial semiconductor material portions that include a non-planar bottommost surface and a non-planar topmost surface are grown from at least the exposed sidewalls of each semiconductor fin not including the gate structure or the gate spacer to merge adjacent semiconductor fins. A gap is present beneath epitaxial semiconductor material portions and the topmost surface of the insulator layer. A second epitaxial semiconductor material is formed on the epitaxial semiconductor material portions and thereafter the second epitaxial semiconductor material is converted into a metal semiconductor alloy.

公开(公告)号：US09287264B1

公开(公告)日：2016-03-15

申请号：US14561395

申请日：2014-12-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Kangguo Cheng ,  Eric C. T. Harley ,  Judson R. Holt ,  Gauri V. Karve ,  Yue Ke ,  Derrick Liu ,  Timothy J. McArdle ,  Shogo Mochizuki ,  Alexander Reznicek ,  Melissa A. Smith

IPC: H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/84 ,  H01L29/36 ,  H01L29/20 ,  H01L29/16 ,  H01L27/12

CPC classification number: H01L27/0924 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20 ,  H01L29/36 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: Embodiments of the present invention provide a method for epitaxially growing a FinFET. One method may include providing a semiconductor substrate including an insulator and an underlayer; forming a channel layer on the semiconductor substrate using epitaxial growth; etching a recess into the channel layer and epitaxially regrowing a portion on the channel layer; etching the channel layer and the underlayer to form fins; forming a gate structure and a set of spacers; etching a source drain region into the channel layer; and forming a source drain material in the source drain region.

Abstract translation: 本发明的实施例提供了一种外延生长FinFET的方法。 一种方法可以包括提供包括绝缘体和底层的半导体衬底; 使用外延生长在所述半导体衬底上形成沟道层; 将凹槽蚀刻到沟道层中并外延地再生沟道层上的一部分; 蚀刻通道层和底层以形成翅片; 形成栅极结构和一组间隔物; 将源漏区蚀刻到沟道层中; 以及在源极漏极区域中形成源极漏极材料。

公开(公告)号：US09685334B1

公开(公告)日：2017-06-20

申请号：US15134917

申请日：2016-04-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Yue Ke ,  Mohammad Hasanuzzaman ,  Benjamin G. Moser ,  Shahrukh A. Khan ,  Sean M. Polvino

IPC: H01L21/225 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L21/2254 ,  H01L21/02378 ,  H01L21/02527 ,  H01L21/0262 ,  H01L21/2257 ,  H01L29/66795

Abstract: Methods of forming a semiconductor fin and methods for controlling dopant diffusion to a semiconductor fin are disclosed herein. The methods provide alternative ways to incorporate a carbon dopant into the fin to later control out-diffusion of dopants from a dopant-including epitaxial layer. One method includes depositing a carbon-containing layer over a portion of the fin adjacent to the gate and annealing to diffuse carbon from the carbon-containing layer into at least the portion of the semiconductor fin. This method can be applied to SOI or bulk semiconductor substrates. Another method includes epitaxially growing a carbon dopant containing semiconductor layer for later use in forming the fin.

公开(公告)号：US20160181285A1

公开(公告)日：2016-06-23

申请号：US15054951

申请日：2016-02-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Eric C.T. Harley ,  Judson R. Holt ,  Yue Ke ,  Timothy J. McArdle ,  Shogo Mochizuki ,  Alexander Reznicek

IPC: H01L27/12 ,  H01L29/08 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L27/1211 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming an abrupt junction in the channel regions of high density technologies, such as tight pitch FinFET devices, using recessed source-drain (S-D) regions and annealing techniques. In an embodiment, a faceted buffer layer, deposited before the S-D region is formed, may be used to control the profile and dopant concentration of the junction under the channel. In another embodiment, the profile and dopant concentration of the junction may be controlled via a dopant concentration gradient in the S-D region.

公开(公告)号：US20160163707A1

公开(公告)日：2016-06-09

申请号：US15016612

申请日：2016-02-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Kangguo Cheng ,  Eric C.T. Harley ,  Judson R. Holt ,  Gauri V. Karve ,  Yue Ke ,  Derrick Liu ,  Timothy J. McArdle ,  Shogo Mochizuki ,  Alexander Reznicek ,  Melissa Alyson Smith

IPC: H01L27/092 ,  H01L29/08 ,  H01L29/161 ,  H01L29/10

CPC classification number: H01L27/0924 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20 ,  H01L29/36 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: Embodiments of the present invention provide a method for epitaxially growing a FinFET. One method may include providing a semiconductor substrate including an insulator and an underlayer; forming a channel layer on the semiconductor substrate using epitaxial growth; etching a recess into the channel layer and epitaxially regrowing a portion on the channel layer; etching the channel layer and the underlayer to form fins; forming a gate structure and a set of spacers; etching a source drain region into the channel layer; and forming a source drain material in the source drain region.

Abstract translation: 本发明的实施例提供了一种外延生长FinFET的方法。 一种方法可以包括提供包括绝缘体和底层的半导体衬底; 使用外延生长在所述半导体衬底上形成沟道层; 将凹槽蚀刻到沟道层中并外延地再生沟道层上的一部分; 蚀刻通道层和底层以形成翅片; 形成栅极结构和一组间隔物; 将源漏区蚀刻到沟道层中; 以及在源极漏极区域中形成源极漏极材料。