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1.
公开(公告)号:US09583397B1
公开(公告)日:2017-02-28
申请号:US15151720
申请日:2016-05-11
Applicant: GLOBALFOUNDRIES INC.
Inventor: Derya Deniz , Benjamin G. Moser , Sunit S. Mahajan , Domingo A. Ferrer Luppi
IPC: H01L21/336 , H01L21/8238 , H01L29/45 , H01L21/3205 , H01L21/3215 , H01L21/768 , H01L21/321 , H01L21/285 , H01L21/266
CPC classification number: H01L21/823814 , H01L21/266 , H01L21/28518 , H01L21/2855 , H01L21/28568 , H01L21/32053 , H01L21/3212 , H01L21/3215 , H01L21/76841 , H01L21/76843 , H01L21/76855 , H01L21/76859 , H01L21/76889 , H01L21/823871 , H01L29/45 , H01L29/785
Abstract: One aspect of the disclosure relates to a contact within a dielectric layer to a source/drain terminal of a field-effect-transistor (FET). The contact may include: a titanium-tantalum-silicide at a surface of the source/drain terminal; a barrier layer over the titanium-tantalum-silicide; and a metal over the barrier layer and extending to a top surface of the dielectric layer.
Abstract translation: 本公开的一个方面涉及电介质层中与场效应晶体管(FET)的源极/漏极端子的接触。 接触可以包括:在源极/漏极端子的表面处的钛 - 钽 - 硅化物; 在钛 - 钽 - 硅化物上的阻挡层; 以及阻挡层上的金属并延伸到电介质层的顶表面。
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公开(公告)号:US10263065B2
公开(公告)日:2019-04-16
申请号:US14932441
申请日:2015-11-04
Applicant: GLOBALFOUNDRIES INC.
Inventor: Domingo A. Ferrer Luppi , Aritra Dasgupta , Benjamin G. Moser
IPC: H01L49/02
Abstract: Methods of forming a metal resistor are provided. The methods may include: depositing a metal layer, e.g., tungsten, on a substrate; and forming the metal resistor by implanting a semiconductor species, e.g., silicon and/or germanium, into the metal layer to form a semiconductor-metal alloy layer from at least a portion of the metal layer. In certain embodiments, an adhesion layer may be deposited by ALD prior to metal layer depositing. The metal resistor has a sheet resistance that remains substantially constant prior to and after subsequent annealing.
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公开(公告)号:US09748235B2
公开(公告)日:2017-08-29
申请号:US15013169
申请日:2016-02-02
Applicant: GLOBALFOUNDRIES INC.
Inventor: Aritra Dasgupta , Benjamin G. Moser , Mohammad Hasanuzzaman , Murshed M. Chowdhury , Shahrukh A. Khan , Shafaat Ahmed , Joyeeta Nag
IPC: H01L27/088 , H01L29/49 , H01L29/51 , H01L21/8234
CPC classification number: H01L27/0886 , H01L21/823431 , H01L21/82345 , H01L21/823821 , H01L21/823842 , H01L27/0924 , H01L29/4958 , H01L29/4966 , H01L29/511 , H01L29/518
Abstract: One aspect of the disclosure relates to a method of forming an integrated circuit structure. The method may include: forming a first work function metal over a set of fins having at least a first fin and a second fin; implanting the first work function metal with a first species; removing the implanted first work function metal from over the first fin such that a remaining portion of the implanted first work function metal remains over the second fin; forming a second work function metal over the set of fins including over the remaining portion of the implanted first work function metal; implanting the second work function metal with a second species; and forming a metal over the implanted second work function metal over the set of fins thereby forming the gate stack.
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公开(公告)号:US20170221889A1
公开(公告)日:2017-08-03
申请号:US15013169
申请日:2016-02-02
Applicant: GLOBALFOUNDRIES INC.
Inventor: Aritra Dasgupta , Benjamin G. Moser , Mohammad Hasanuzzaman , Murshed M. Chowdhury , Shahrukh A. Khan , Shafaat Ahmed , Joyeeta Nag
IPC: H01L27/088 , H01L29/51 , H01L21/8234 , H01L29/49
CPC classification number: H01L27/0886 , H01L21/823431 , H01L21/82345 , H01L21/823821 , H01L21/823842 , H01L27/0924 , H01L29/4958 , H01L29/4966 , H01L29/511 , H01L29/518
Abstract: One aspect of the disclosure relates to a method of forming an integrated circuit structure. The method may include: forming a first work function metal over a set of fins having at least a first fin and a second fin; implanting the first work function metal with a first species; removing the implanted first work function metal from over the first fin such that a remaining portion of the implanted first work function metal remains over the second fin; forming a second work function metal over the set of fins including over the remaining portion of the implanted first work function metal; implanting the second work function metal with a second species; and forming a metal over the implanted second work function metal over the set of fins thereby forming the gate stack.
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5.
公开(公告)号:US10020260B1
公开(公告)日:2018-07-10
申请号:US15388530
申请日:2016-12-22
Applicant: GLOBALFOUNDRIES INC.
Inventor: Shafaat Ahmed , Benjamin G. Moser , Vimal Kumar Kamineni , Dinesh Koli , Vishal Chhabra
IPC: H01L23/48 , H01L23/532 , H01L23/528 , H01L21/768 , H01L21/265 , H01L21/321 , H01L21/3213 , H01L23/522
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a corrosion and/or etch protection layer for contacts and interconnect metallization integration structures and methods of manufacture. The structure includes a metallization structure formed within a trench of a substrate and a layer of cobalt phosphorous (CoP) on the metallization structure. The CoP layer is structured to prevent metal migration from the metallization structure and corrosion of the metallization structure during etching processes.
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公开(公告)号:US09685334B1
公开(公告)日:2017-06-20
申请号:US15134917
申请日:2016-04-21
Applicant: GLOBALFOUNDRIES INC.
Inventor: Yue Ke , Mohammad Hasanuzzaman , Benjamin G. Moser , Shahrukh A. Khan , Sean M. Polvino
IPC: H01L21/225 , H01L21/02 , H01L29/66
CPC classification number: H01L21/2254 , H01L21/02378 , H01L21/02527 , H01L21/0262 , H01L21/2257 , H01L29/66795
Abstract: Methods of forming a semiconductor fin and methods for controlling dopant diffusion to a semiconductor fin are disclosed herein. The methods provide alternative ways to incorporate a carbon dopant into the fin to later control out-diffusion of dopants from a dopant-including epitaxial layer. One method includes depositing a carbon-containing layer over a portion of the fin adjacent to the gate and annealing to diffuse carbon from the carbon-containing layer into at least the portion of the semiconductor fin. This method can be applied to SOI or bulk semiconductor substrates. Another method includes epitaxially growing a carbon dopant containing semiconductor layer for later use in forming the fin.
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公开(公告)号:US20170125509A1
公开(公告)日:2017-05-04
申请号:US14932441
申请日:2015-11-04
Applicant: GLOBALFOUNDRIES INC.
Inventor: Domingo A. Ferrer Luppi , Aritra Dasgupta , Benjamin G. Moser
IPC: H01L49/02
CPC classification number: H01L28/24
Abstract: Methods of forming a metal resistor are provided. The methods may include: depositing a metal layer, e.g., tungsten, on a substrate; and forming the metal resistor by implanting a semiconductor species, e.g., silicon and/or germanium, into the metal layer to form a semiconductor-metal alloy layer from at least a portion of the metal layer. In certain embodiments, an adhesion layer may be deposited by ALD prior to metal layer depositing. The metal resistor has a sheet resistance that remains substantially constant prior to and after subsequent annealing.
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