公开(公告)号：US20240162146A1

公开(公告)日：2024-05-16

申请号：US17984724

申请日：2022-11-10

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh M. PANDEY ,  Rajendran KRISHNASAMY ,  Vibhor JAIN

IPC: H01L23/525

CPC classification number: H01L23/5256

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an e-fuse with metal fill structures and methods of manufacture. The structure includes: an insulator material; an e-fuse structure on the insulator material; a plurality of heaters on the insulator material and positioned on sides of the e-fuse structure; and conductive fill material within a space between the e-fuse structure and the plurality of heaters.

公开(公告)号：US20240006491A1

公开(公告)日：2024-01-04

申请号：US17852966

申请日：2022-06-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Uppili S. RAGHUNATHAN ,  Vibhor JAIN ,  Qizhi LIU ,  Yves T. NGU ,  Ajay RAMAN ,  Rajendran KRISHNASAMY ,  Alvin J. JOSEPH

IPC: H01L29/10 ,  H01L29/08

CPC classification number: H01L29/1095 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with a stepped emitter and methods of manufacture. The structure includes: a collector; a base over the collector; and an emitter over the base, the emitter comprising at least one stepped feature over the base.

公开(公告)号：US20230411384A1

公开(公告)日：2023-12-21

申请号：US17842266

申请日：2022-06-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anindya NATH ,  Robert J. GAUTHIER, JR. ,  Rajendran KRISHNASAMY

IPC: H01L27/02 ,  H01L49/02

CPC classification number: H01L27/0288 ,  H01L27/0259 ,  H01L28/20

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an electrostatic discharge device (ESD) with a pinch resistor and methods of manufacture. The structure includes: a semiconductor substrate; a shallow trench isolation structure extending into the semiconductor substrate; an amorphous layer in the semiconductor substrate and below the shallow trench isolation structure; and a pinch resistor between the shallow trench isolation structure and the amorphous layer.

公开(公告)号：US20220352401A1

公开(公告)日：2022-11-03

申请号：US17863922

申请日：2022-07-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Rajendran KRISHNASAMY ,  Steven M. SHANK ,  John J. ELLIS-MONAGHAN ,  Ramsey HAZBUN

IPC: H01L31/0352 ,  H01L31/0232 ,  H01L31/18 ,  H01L31/103 ,  H01L31/028

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodiode with an integrated, light focusing elements and methods of manufacture. The structure includes: a trench photodiode comprising a domed structure; and a doped material on the domed structure, the doped material having a concave underside surface.

公开(公告)号：US20210257454A1

公开(公告)日：2021-08-19

申请号：US16791214

申请日：2020-02-14

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. ADUSUMILLI ,  Rajendran KRISHNASAMY ,  Steven M. SHANK ,  Vibhor JAIN

IPC: H01L29/08 ,  H01L29/49 ,  H01L29/737 ,  H01L29/66 ,  H01L29/16

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor having one or more sealed airgap and methods of manufacture. The structure includes: a subcollector region in a substrate; a collector region above the substrate; a sealed airgap formed at least partly in the collector region; a base region adjacent to the collector region; and an emitter region adjacent to the base region.

公开(公告)号：US20240304612A1

公开(公告)日：2024-09-12

申请号：US18118323

申请日：2023-03-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh Mani PANDEY ,  Sagar Premnath KARALKAR ,  Rajendran KRISHNASAMY ,  Anindya NATH

IPC: H01L27/02

CPC classification number: H01L27/0262

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high performance silicon controlled rectifier (SCR) devices and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; a plurality of shallow trench isolation structures extending into the first well and the second well; and a deep trench isolation structure between the plurality of shallow trench isolation structures and extending into the semiconductor material deeper than the plurality of shallow trench isolation structures.

公开(公告)号：US20240178310A1

公开(公告)日：2024-05-30

申请号：US18070800

申请日：2022-11-29

Applicant: GlobalFoundries U.S. Inc.

Inventor： Santosh SHARMA ,  Rajendran KRISHNASAMY ,  Johnatan A. KANTAROVSKY

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66462

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a high-electron-mobility transistor and methods of manufacture. The structure includes: a gate structure; and a channel region under the gate structure, the channel region having a first portion including a first thickness and a second portion having a second thickness greater than the first thickness, the second portion being positioned remotely from the gate structure.

公开(公告)号：US20240145585A1

公开(公告)日：2024-05-02

申请号：US17978633

申请日：2022-11-01

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anupam DUTTA ,  Rajendran KRISHNASAMY ,  Vvss Satyasuresh CHOPPALLI ,  Vibhor JAIN ,  Robert J. Gauthier, JR.

IPC: H01L29/737

CPC classification number: H01L29/7375

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a heterojunction bipolar transistor comprising a collector region, a base region and an emitter region; and at least one non-single-crystal semiconductor region in the collector region of the heterojunction bipolar transistor.

公开(公告)号：US20240088242A1

公开(公告)日：2024-03-14

申请号：US17943925

申请日：2022-09-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Johnatan A. KANTAROVSKY ,  Rebouh BENELBAR ,  Ajay RAMAN ,  Michel J. ABOU-KHALIL ,  Rajendran KRISHNASAMY ,  Randy L. WOLF

IPC: H01L29/417 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/41775 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/401 ,  H01L29/66462 ,  H01L29/7786

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high-electron-mobility transistors and methods of manufacture. A structure includes: a semiconductor layer on a semiconductor material; a gate structure on the semiconductor layer; a drain region comprising the semiconductor layer and which is adjacent to the gate structure; an ohmic contact which includes at least one terminal connection connecting to the semiconductor material, the ohmic contact being adjacent to the drain region and spaced away from the gate structure; and a capacitance reducing structure adjacent to the drain region.

公开(公告)号：US20240030341A1

公开(公告)日：2024-01-25

申请号：US17872360

申请日：2022-07-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Shesh Mani PANDEY ,  Rajendran KRISHNASAMY

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7825 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/66704

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to laterally-diffused metal-oxide semiconductors and methods of manufacture. The structure includes: a drift region within a semiconductor substrate; a shallow trench isolation structure extending within the drift region; and a gate structure over the semiconductor substrate and extending within the shallow trench isolation structure.