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公开(公告)号:US20250015128A1
公开(公告)日:2025-01-09
申请号:US18894485
申请日:2024-09-24
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Vibhor JAIN , Anthony K. STAMPER , John J. ELLIS-MONAGHAN , Steven M. SHANK , Rajendran KRISHNASAMY
IPC: H01L29/06 , H01L21/763 , H01L29/08 , H01L29/165 , H01L29/66 , H01L29/737
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a trap rich isolation region embedded within the bulk substrate; and a heterojunction bipolar transistor above the trap rich isolation region, with its sub-collector region separated by the trap rich isolation region by a layer of the bulk substrate.
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公开(公告)号:US20240162345A1
公开(公告)日:2024-05-16
申请号:US17984736
申请日:2022-11-10
Applicant: GlobalFoundries U.S. Inc.
Inventor: Shesh M. PANDEY , Rajendran KRISHNASAMY , Judson R. HOLT , Chung Foong TAN
IPC: H01L29/78 , H01L21/762 , H01L29/40 , H01L29/66
CPC classification number: H01L29/7823 , H01L21/76224 , H01L29/401 , H01L29/407 , H01L29/66681
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with a metal field plate contact and methods of manufacture. The structure includes: a gate structure on a semiconductor substrate; a shallow trench isolation structure within the semiconductor substrate; and a contact extending from the gate structure and into the shallow trench isolation structure.
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公开(公告)号:US20240347528A1
公开(公告)日:2024-10-17
申请号:US18300161
申请日:2023-04-13
Applicant: GlobalFoundries U.S. Inc.
Inventor: Anindya NATH , Rajendran KRISHNASAMY , Souvick MITRA , Steven M. SHANK , Sagar P. KARALKAR
IPC: H01L27/02
CPC classification number: H01L27/0262
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to silicon control rectifiers and methods of manufacture. A structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; a plurality of shallow trench isolation structures extending into the first well and the second well; and at least one gate structure in the first well which abuts one shallow trench isolation structure of the plurality of shallow trench isolation structures.
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公开(公告)号:US20240072184A1
公开(公告)日:2024-02-29
申请号:US17895599
申请日:2022-08-25
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ramsey HAZBUN , John ELLIS-MONAGHAN , Siva P. ADUSUMILLI , Rajendran KRISHNASAMY
IPC: H01L31/0352 , H01L31/18
CPC classification number: H01L31/035281 , H01L31/18 , H01L31/028
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodetectors and methods of manufacture. The structure includes: a trench structure in a semiconductor substrate; at least one fin structure comprising semiconductor material which extends from a bottom of the trench structure; a photodetector material within the trench structure and extends from the at least one fin structure; a first contact connected to and on a first side of the photodetector material; and a second contact connected to the semiconductor substrate on a second side of the photodetector material.
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公开(公告)号:US20230420596A1
公开(公告)日:2023-12-28
申请号:US17849285
申请日:2022-06-24
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: John J. ELLIS-MONAGHAN , Rajendran KRISHNASAMY , Siva P. ADUSUMILLI , Ramsey HAZBUN
IPC: H01L31/105 , H01L31/0288 , H01L31/18
CPC classification number: H01L31/105 , H01L31/0288 , H01L31/1804 , H01L31/0216
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodetector and methods of manufacture. The structure includes: a photodetector; and a semiconductor material on the photodetector, the semiconductor material comprising a first dopant type, a second dopant type and intrinsic semiconductor material separating the first dopant type from the second dopant type.
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公开(公告)号:US20240282853A1
公开(公告)日:2024-08-22
申请号:US18111995
申请日:2023-02-21
Applicant: GlobalFoundries U.S. Inc.
Inventor: Shesh Mani PANDEY , Rajendran KRISHNASAMY , Chung Foong TAN
CPC classification number: H01L29/7825 , H01L21/28088 , H01L29/4966 , H01L29/66704
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a device with workfunction metal in a drift region and methods of manufacture. The structure includes: a gate structure having at least a first workfunction metal in a channel region and a second workfunction metal, which is different from the first workfunction metal, in a trench in a drift region; and a sidewall spacer adjacent to the gate structure within the trench in the drift region.
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公开(公告)号:US20240282847A1
公开(公告)日:2024-08-22
申请号:US18111959
申请日:2023-02-21
Applicant: GlobalFoundries U.S. Inc.
Inventor: Shesh Mani PANDEY , Sagar Premnath KARALKAR , Rajendran KRISHNASAMY , Chung Foong TAN
CPC classification number: H01L29/74 , H01L29/66363
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high performance silicon controlled rectifier (SCR) devices and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; and a porous semiconductor region extending in the first well and the second well.
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公开(公告)号:US20230299132A1
公开(公告)日:2023-09-21
申请号:US18324637
申请日:2023-05-26
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Vibhor JAIN , Anthony K. STAMPER , John J. ELLIS-MONAGHAN , Steven M. SHANK , Rajendran KRISHNASAMY
IPC: H01L29/06 , H01L29/08 , H01L29/66 , H01L29/737 , H01L21/763 , H01L29/165
CPC classification number: H01L29/0642 , H01L29/0826 , H01L29/66242 , H01L29/7371 , H01L21/763 , H01L29/165
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a trap rich isolation region embedded within the bulk substrate; and a heterojunction bipolar transistor above the trap rich isolation region, with its sub-collector region separated by the trap rich isolation region by a layer of the bulk substrate.
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公开(公告)号:US20230290880A1
公开(公告)日:2023-09-14
申请号:US17692218
申请日:2022-03-11
Applicant: GlobalFoundries U.S. Inc.
Inventor: Anupam DUTTA , Vvss Satyasuresh CHOPPALLI , Rajendran KRISHNASAMY
CPC classification number: H01L29/7816 , H01L29/0611
Abstract: According to various embodiments, there is provided a MOSFET device. The MOSFET device may include a substrate; a first doped region disposed in the substrate; a second doped region disposed in the substrate, wherein the first doped region and the second doped region are laterally adjacent to each other; a third doped region disposed in the first doped region; a fourth doped region disposed in the second doped region; a gate disposed on the substrate, over the first and second doped regions, and between the third and fourth doped regions; and at least one high resistance region embedded in at least the second doped region, wherein the first doped region has a first conductivity type, wherein the second doped region, the third doped region, and the fourth doped region have a second conductivity type, wherein the first conductivity type and the second conductivity type are different.
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公开(公告)号:US20220115549A1
公开(公告)日:2022-04-14
申请号:US17065862
申请日:2020-10-08
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Rajendran KRISHNASAMY , Steven M. SHANK , John J. ELLIS-MONAGHAN , Ramsey HAZBUN
IPC: H01L31/0352 , H01L31/0232 , H01L31/028 , H01L31/103 , H01L31/18
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodiode with an integrated, light focusing elements and methods of manufacture. The structure includes: a trench photodiode comprising a domed structure; and a doped material on the domed structure, the doped material having a concave underside surface.
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