Methods for addressing electrophoretic displays
    13.
    发明授权
    Methods for addressing electrophoretic displays 有权
    解决电泳显示的方法

    公开(公告)号:US06531997B1

    公开(公告)日:2003-03-11

    申请号:US09561424

    申请日:2000-04-28

    IPC分类号: G09G334

    摘要: Novel addressing schemes for controlling bistable electronically addressable displays include the use of addressing signals with additional signals having opposite polarity and equal integrated signal strength, and addressing schemes that minimize the number of state changes that a display element undergoes. In one embodiment, pre-pulses are employed to apply a pre-stress to an display element that is equal and opposite to the electrical stress applied in addressing the element. In another embodiment, the addressing signal is followed by a post-stressing pulse. Methods for minimizing the number of display elements that must change state to change the image displayed include the determination of a set of elements that must be deactivated and a set of elements that must be activated to change the image depicted by a display. Alternatively, only the elements forming one image are deactivated before the elements forming a different image are activated.

    摘要翻译: 用于控制双稳态电子可寻址显示器的新型寻址方案包括使用具有相反极性和相等的集成信号强度的附加信号的寻址信号,以及使显示元件经历的状态变化的数量最小化的寻址方案。 在一个实施例中,采用预脉冲来对显示元件施加预应力,所述显示元件与在寻址元件时施加的电应力相等和相反。 在另一个实施例中,寻址信号之后是后应力脉冲。 用于最小化必须改变状态以改变显示的图像的显示元素的数量的方法包括必须被去激活的一组元素的确定以及必须被激活以改变由显示器描绘的图像的一组元素。 或者,只有形成一个图像的元素在形成不同图像的元素被激活之前被去激活。

    PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS
    15.
    发明申请
    PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS 有权
    用于形成电光显示器的背板的方法

    公开(公告)号:US20100265239A1

    公开(公告)日:2010-10-21

    申请号:US12825991

    申请日:2010-06-29

    IPC分类号: G06F3/038 H01J9/24 H01L21/20

    摘要: A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译: 通过将基板固定到刚性载体上,形成非线性元件,然后将柔性基板与载体分离,在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中,通过形成栅电极,沉积介电层,半导体层和导电层,在绝缘基板上形成晶体管,图案化导电层以形成源极,漏极和像素电极,覆盖该沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻,蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺,并且使用 第二导电层和介电层作为蚀刻掩模。 最后,本发明提供一种驱动脉冲敏感电光显示器的方法。

    Process for fabricating thin film transistors
    16.
    发明授权
    Process for fabricating thin film transistors 有权
    制造薄膜晶体管的工艺

    公开(公告)号:US06825068B2

    公开(公告)日:2004-11-30

    申请号:US09836884

    申请日:2001-04-17

    IPC分类号: H01L2100

    CPC分类号: H01L29/66765 H01L29/78603

    摘要: Transistors are formed by depositing at least one layer of semiconductor material on a substrate comprising a polyphenylene polyimide. The substrate permits the use of processing temperatures in excess of 300° C. during the processes used to form the transistors, thus allowing the formation of high quality silicon semiconductor layers. The substrate also has a low coefficient of thermal expansion, which closely matches that of silicon, thus reducing any tendency for a silicon layer to crack or delaminate.

    摘要翻译: 晶体管通过在包含聚亚苯基聚酰亚胺的衬底上沉积至少一层半导体材料形成。 在用于形成晶体管的工艺期间,衬底允许使用超过300℃的处理温度,从而允许形成高质量的硅半导体层。 该基板也具有低的热膨胀系数,其与硅的热膨胀系数非常接近,从而减少硅层破裂或分层的任何趋势。

    Addressing methods for displays having zero time-average field
    17.
    发明授权
    Addressing methods for displays having zero time-average field 有权
    具有零时间平均场的显示器的寻址方法

    公开(公告)号:US06504524B1

    公开(公告)日:2003-01-07

    申请号:US09520743

    申请日:2000-03-08

    IPC分类号: G09G334

    摘要: Novel addressing schemes for controlling electronically addressable displays include the use of addressing signals with additional signals having opposite polarity and equal integrated signal strength and addressing schemes that minimize the number of state changes that a display element undergoes. In one embodiment, pre-pulses are employed to apply a pre-stress to an display element that is equal and opposite to the electrical stress applied in addressing the element. In another embodiment, the addressing signal is followed by a post-stressing pulse. Methods for minimizing the number of display elements that must change state to change the image displayed include the determination of a set of elements that must be deactivated and a set of elements that must be activated to change the image depicted by a display.

    摘要翻译: 用于控制电子可寻址显示器的新型寻址方案包括使用具有相反极性和相等的集成信号强度的附加信号的寻址信号以及使显示元件经历的状态变化的数量最小化的寻址方案。 在一个实施例中,采用预脉冲来对显示元件施加预应力,所述显示元件与在寻址元件时施加的电应力相等和相反。 在另一个实施例中,寻址信号之后是后应力脉冲。 用于最小化必须改变状态以改变显示的图像的显示元素的数量的方法包括必须被去激活的一组元素的确定以及必须被激活以改变由显示器描绘的图像的一组元素。

    Processes for forming backplanes for electro-optic displays
    18.
    发明授权
    Processes for forming backplanes for electro-optic displays 有权
    用于形成电光显示器背板的工艺

    公开(公告)号:US08389381B2

    公开(公告)日:2013-03-05

    申请号:US12825991

    申请日:2010-06-29

    IPC分类号: H01L21/30

    摘要: A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译: 通过将基板固定到刚性载体上,形成非线性元件,然后将柔性基板与载体分离,在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中,通过形成栅电极,沉积介电层,半导体层和导电层,在绝缘基板上形成晶体管,图案化导电层以形成源极,漏极和像素电极,覆盖该沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻,蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺,并且使用 第二导电层和介电层作为蚀刻掩模。 最后,本发明提供一种驱动脉冲敏感电光显示器的方法。

    Processes for forming backplanes for electro-optic displays
    19.
    发明授权
    Processes for forming backplanes for electro-optic displays 失效
    用于形成电光显示器背板的工艺

    公开(公告)号:US07442587B2

    公开(公告)日:2008-10-28

    申请号:US11424258

    申请日:2006-06-15

    IPC分类号: H01L21/00

    摘要: A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译: 通过将基板固定到刚性载体上,形成非线性元件,然后将柔性基板与载体分离,在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中,通过形成栅电极,沉积介电层,半导体层和导电层,在绝缘基板上形成晶体管,图案化导电层以形成源极,漏极和像素电极,覆盖栅极电极的沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻,蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺,并且使用 第二导电层和介电层作为蚀刻掩模。 最后,本发明提供一种驱动脉冲敏感电光显示器的方法。

    Processes for forming backplanes for electro-optic displays
    20.
    发明授权
    Processes for forming backplanes for electro-optic displays 有权
    用于形成电光显示器背板的工艺

    公开(公告)号:US07785988B2

    公开(公告)日:2010-08-31

    申请号:US12243411

    申请日:2008-10-01

    IPC分类号: H01L21/30

    摘要: A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译: 通过将基板固定到刚性载体上,形成非线性元件,然后将柔性基板与载体分离,在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中,通过形成栅电极,沉积介电层,半导体层和导电层,在绝缘基板上形成晶体管,图案化导电层以形成源极,漏极和像素电极,覆盖该沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻,蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺,并且使用 第二导电层和介电层作为蚀刻掩模。 最后,本发明提供一种驱动脉冲敏感电光显示器的方法。