公开(公告)号：US20240069761A1

公开(公告)日：2024-02-29

申请号：US18179563

申请日：2023-03-07

Applicant: Hitachi, Ltd.

Inventor： Naoya OKADA ,  Kentaro SHIMADA ,  Yuki KOTAKE ,  Yukiyoshi TAKAMURA

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0655 ,  G06F3/0679

Abstract: A storage system includes a storage controller and a plurality of storage drives. The storage controller holds power management information for managing power supplied to the storage system and power consumption of an operating mounted device of the storage system, and definition information for defining a relationship between power states and power consumption of the plurality of storage drives. The storage controller determines a power budget that can be supplied to the plurality of storage drives, based on the power management information according to a change in a configuration of the storage system, and determines a power state of each of the plurality of storage drives based on the power budget and the definition information.

公开(公告)号：US20230136735A1

公开(公告)日：2023-05-04

申请号：US18083653

申请日：2022-12-19

Applicant: Hitachi, Ltd.

Inventor： Naoya OKADA ,  Takashi NAGAO ,  Kentaro SHIMADA ,  Ryosuke TATSUMI ,  Sadahiro SUGIMOTO

IPC: G06F3/06

Abstract: The present disclosure is to optimize processes in a storage system. A storage system includes: a first controller including a first computing device and a first memory; a second controller including a second computing device and a second memory; and an interface circuit that transfers data between the first controller and the second controller. The interface circuit reads first compressed data from the second memory. The interface circuit decompresses the first compressed data to generate first uncompressed data, and writes the first uncompressed data into the first memory.

公开(公告)号：US20170075816A1

公开(公告)日：2017-03-16

申请号：US15125313

申请日：2014-04-24

Applicant: HITACHI, LTD.

Inventor： Naoya OKADA ,  Masanori TAKADA ,  Shintaro KUDO ,  Yusuke NONAKA ,  Tadashi TAKEUCHI

IPC: G06F12/1009 ,  G06F3/06 ,  G06F13/16 ,  G06F12/109

CPC classification number: G06F12/1009 ,  G06F3/06 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0683 ,  G06F12/109 ,  G06F12/1441 ,  G06F13/14 ,  G06F13/1668 ,  G06F21/79 ,  G06F2221/2141

Abstract: A control apparatus, in a storage system, accesses a specific storage area in a shared memory by designating a fixed virtual address, even when a capacity of the shared memory in the storage system changes. A space of a physical address indicating a storage area in a plurality of memories in a self-control-subsystem of two control-subsystems and a space of a physical address indicating a storage area in the plurality of memories in the other-control-subsystem are associated with a space of a virtual address used by each of a processor and an input/output device in the self-control-subsystem. Upon receiving data transferred from the other-control-subsystem to the self-control-subsystem, a relay device translates a virtual address indicating a transfer destination of the data designated by the other-control-subsystem into a virtual address in the self-control-subsystem based on an offset determined in advance, and transfers the data to the translated virtual address.

Abstract translation: 存储系统中的控制装置即使当存储系统中的共享存储器的容量改变时，通过指定固定的虚拟地址来访问共享存储器中的特定存储区域。 指示两个控制子系统的自控子系统中的多个存储器中的存储区域的物理地址的空间和指示另一个控制子系统中的多个存储器中的存储区域的物理地址的空间 与自控子系统中的处理器和输入/输出设备中的每一个使用的虚拟地址的空间相关联。 在接收到从其他控制子系统传送到自控子系统的数据时，中继装置将指示由另一控制子系统指定的数据的传送目的地的虚拟地址转换为自控制中的虚拟地址 - 基于预先确定的偏移的子系统，并将数据传送到转换的虚拟地址。

公开(公告)号：US20150317272A1

公开(公告)日：2015-11-05

申请号：US14650996

申请日：2013-01-23

Applicant: HITACHI, LTD

Inventor： Katsuya TANAKA ,  Masanori TAKADA ,  Naoya OKADA

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4081 ,  G06F13/385 ,  G06F13/4022 ,  G06F13/4221 ,  G06F2213/0026 ,  G06F2213/3802 ,  G06F2213/3804

Abstract: In a storage subsystem adopting HDD and PCIe-SSD as storage media, as a method for preventing the complication of having to select a removal method while considering the drive type inserted to the drive slot since the method for removing the HDD differs from the method for removing the PCIe-SSD according to the prior art, the present invention provides an LED for displaying whether it is possible to remove the HDD or the PCIe-SSD inserted to the slot of a drive enclosure, wherein when an HDD is inserted in the drive slot, the LED displays that removal of the HDD is enabled when power supply to the HDD is stopped, and when PCIe-SSD is inserted to the drive slot, the LED displays that removal of the SSD is enabled when Downstream Port Containment (DPC) is triggered in the downstream port of the PCIe switch to which the SSD is connected.

Abstract translation: 在采用HDD和PCIe-SSD作为存储介质的存储子系统中，作为防止在考虑插入到驱动器槽的驱动类型的同时选择拆卸方法的复杂性的方法，因为用于移除HDD的方法与用于 根据现有技术移除PCIe-SSD，本发明提供了一种LED，用于显示是否可以移除插入到驱动器机箱的槽中的HDD或PCIe-SSD，其中当将HDD插入驱动器中时 插槽时，LED显示屏停止HDD供电，并且当PCIe-SSD插入驱动器插槽时，LED显示，当下游端口遏制（DPC） 在与SSD连接的PCIe交换机的下游端口中触发。

公开(公告)号：US20150317093A1

公开(公告)日：2015-11-05

申请号：US14762039

申请日：2013-12-24

Applicant: HITACHI, LTD.

Inventor： Naoya OKADA ,  Yusuke NONAKA ,  Akihiko ARAKI ,  Shintaro KUDO ,  Makio MIZUNO

IPC: G06F3/06 ,  G06F12/08

CPC classification number: G06F3/0619 ,  G06F3/0647 ,  G06F3/0659 ,  G06F3/0688 ,  G06F3/0689 ,  G06F12/0638 ,  G06F12/08 ,  G06F12/0868 ,  G06F12/0875 ,  G06F12/0893 ,  G06F2212/222 ,  G06F2212/2228 ,  Y02D10/13

Abstract: A storage controller has a processor, a volatile first cache memory that is coupled to the processor and that temporarily stores data, a nonvolatile second cache memory that is coupled to a microprocessor and that temporarily stores data, and a battery that is configured to supply electrical power to at least the processor and the first cache memory when a power stoppage has occurred. The second cache memory includes a dirty data area for storing dirty data, which is data that is not stored in the storage device, and a remaining area other than the dirty data area. When a power stoppage has occurred, the processor stores as target data in the remaining area of the second cache memory either all or a part of the data stored in the first cache memory.

Abstract translation: 存储控制器具有处理器，耦合到处理器并临时存储数据的易失性第一高速缓冲存储器，耦合到微处理器并临时存储数据的非易失性第二高速缓冲存储器，以及被配置为提供电气的电池 当发生停电时，至少将处理器和第一高速缓存存储器供电。 第二高速缓冲存储器包括用于存储不存储在存储装置中的数据的脏数据区域和除脏数据区域以外的剩余区域的脏数据区域。 当发生停电时，处理器将存储在第一高速缓冲存储器中的全部或一部分数据作为目标数据存储在第二高速缓冲存储器的剩余区域中。