公开(公告)号：US09953846B2

公开(公告)日：2018-04-24

申请号：US15261354

申请日：2016-09-09

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Edward Fuergut

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/28 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/566 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3121 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a carrier, providing a plurality of semiconductor chips, the semiconductor chips each including a first main face and a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on the carrier with the second main faces facing the carrier, and applying an encapsulation material to the side faces of the semiconductor chips.

公开(公告)号：US20160311679A1

公开(公告)日：2016-10-27

申请号：US15138313

申请日：2016-04-26

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Alfons Dehe ,  Thomas Kilger ,  Markus Menath ,  Franz Xaver Muehlbauer ,  Daniel Porwol ,  Juergen Wagner

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00896 ,  B81C1/00269 ,  B81C1/00801 ,  B81C2201/0194 ,  B81C2201/053

Abstract: A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.

Abstract translation: 对芯片封装的制造方法进行说明。 多个芯片设置在第一晶片上。 每个芯片具有通向芯片的第一主面的空腔。 空腔被暂时填充或覆盖。 然后将芯片分开。 单片化芯片嵌入封装材料中，然后将空腔重新曝光。

公开(公告)号：US20160155680A1

公开(公告)日：2016-06-02

申请号：US14954145

申请日：2015-11-30

Applicant: Infineon Technologies AG

Inventor： Andreas Stueckjuergen ,  Rainer Leuschner ,  Daniel Porwol

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3185 ,  H01L24/03 ,  H01L24/13 ,  H01L24/96 ,  H01L2224/02381 ,  H01L2224/04105 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/14131 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/182 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014

Abstract: A semiconductor package includes a semiconductor chip having a first main face and side faces, an encapsulation covering at least the side faces of the semiconductor chip, and an electrical redistribution structure arranged over the first main face of the semiconductor chip. A first main surface of the semiconductor package includes a surface of the electrical redistribution structure and a surface of the encapsulation.

Abstract translation: 半导体封装包括具有第一主面和侧面的半导体芯片，至少覆盖半导体芯片的侧面的封装，以及布置在半导体芯片的第一主面上的电再分布结构。 半导体封装的第一主表面包括电再分布结构的表面和封装的表面。

公开(公告)号：US20140197551A1

公开(公告)日：2014-07-17

申请号：US13741113

申请日：2013-01-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Daniel Porwol ,  Edward Fuergut

IPC: H01L21/56 ,  H01L23/28

CPC classification number: H01L21/566 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3121 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00

Abstract: The method comprises providing a carrier, providing a plurality of semiconductor chips, the semiconductor chips each comprising a first main face and a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on the carrier with the second main faces facing the carrier, and applying an encapsulation material to the side faces of the semiconductor chips.

Abstract translation: 该方法包括提供载体，提供多个半导体芯片，所述半导体芯片各自包括第一主面和与第一主面相对的第二主面以及连接第一和第二主面的侧面，将半导体芯片放置在 载体，其中第二主面面向载体，并且将包封材料施加到半导体芯片的侧面。

公开(公告)号：US20200023630A1

公开(公告)日：2020-01-23

申请号：US16504811

申请日：2019-07-08

Applicant: Infineon Technologies AG

Inventor： Alfred Sigl ,  Dominic Maier ,  Daniel Porwol

IPC: B32B38/10 ,  B32B38/18

Abstract: A device for debonding a structure from a main surface region of a carrier includes a tape for laminating to the structure, a first holder and a second holder for spanning the tape and to keep a tension of the tape. The second holder can be movable into a lifted position vertically offset to the main surface region of the carrier. The device can also include a deflecting-element for providing a deflection-line between the first holder and the second holder for deflecting the tape in response to moving the second holder into the lifted position. The deflecting-element can be moveable parallel to the carrier for moving the deflection-line parallel to the carrier and for debonding the structure, laminated to the tape, from the carrier.

公开(公告)号：US10483133B2

公开(公告)日：2019-11-19

申请号：US15944306

申请日：2018-04-03

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Edward Fuergut

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/28 ,  H01L23/00 ,  H01L23/31

Abstract: A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a plurality of semiconductor chips, wherein each semiconductor chip comprises a first main face, a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on a carrier with the second main faces facing the carrier and applying an encapsulation material by transfer molding thereby forming the semiconductor chip panel, wherein the encapsulation material is applied so that the side faces of the semiconductor chips are covered with the encapsulation material while the first main faces are not.

公开(公告)号：US20180350683A1

公开(公告)日：2018-12-06

申请号：US16102174

申请日：2018-08-13

Applicant: Infineon Technologies AG

Inventor： Georg Meyer-Berg ,  Claus von Waechter ,  Michael Bauer ,  Holger Doepke ,  Dominic Maier ,  Daniel Porwol ,  Tobias Schmidt

IPC: H01L21/78 ,  H01L23/00 ,  H01L21/56 ,  B32B37/26

Abstract: A method for handling a product substrate includes bonding a carrier to the product substrate by: applying a layer of a temporary adhesive having a first coefficient of thermal expansion onto a surface of the carrier; and bonding the carrier to the product substrate using the applied temporary adhesive. A surface of the temporary adhesive is in direct contact to a surface of the product substrate. The temporary adhesive includes or is adjacent a filler material having a second coefficient of thermal expansion which is smaller than the first coefficient of thermal expansion, so that stress occurs inside the temporary adhesive layer or at an interface to the product substrate or the carrier during cooling down of the temporary adhesive layer.

公开(公告)号：US20180146512A1

公开(公告)日：2018-05-24

申请号：US15818835

申请日：2017-11-21

Applicant: Infineon Technologies AG

Inventor： Stephan Pindl ,  Daniel Porwol ,  Johann Strasser

IPC: H05B3/00 ,  G02B5/20 ,  G02B5/26 ,  G01N21/17

Abstract: A method for producing an infrared emitter arrangement is provided. The method includes providing a carrier. The carrier includes at least one infrared emitter structure at a first side of the carrier and at least one cutout at a second side of the carrier, said second side being situated opposite the first side of the carrier, wherein the at least one cutout extends from the second side of the carrier in the direction of the at least one infrared emitter structure. The method further includes securing an infrared filter layer structure at the second side of the carrier in such a way that the at least one cutout separates the at least one infrared emitter structure from the infrared filter layer structure.

公开(公告)号：US20180086632A1

公开(公告)日：2018-03-29

申请号：US15704537

申请日：2017-09-14

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Joachim Mahler ,  Daniel Porwol ,  Alfred Sigl

IPC: B81C1/00

CPC classification number: B81C1/00047 ,  B81C1/00666 ,  B81C2201/0125 ,  B81C2201/013 ,  B81C2203/0118 ,  B81C2203/0127

Abstract: A method for fabricating an electronic device is disclosed. In one example, the method comprises providing a semiconductor wafer, forming a plurality of cavities into the semiconductor wafer, filling a stabilization material into the cavities, fabricating a temporary panel by applying a cap sheet onto the semiconductor wafer, the cap sheet covering the cavities, singulating the temporary panel into a plurality of semiconductor devices, fabricating an embedded wafer by embedding the semiconductor devices in an encapsulant, removing the cap sheet of each one of the semiconductor devices, and singulating the embedded wafer into a plurality of electronic devices.

公开(公告)号：US20160247739A1

公开(公告)日：2016-08-25

申请号：US15047098

申请日：2016-02-18

Applicant: Infineon Technologies AG

Inventor： Claus Von Waechter ,  Christian Altschaeffl ,  Holger Doepke ,  Uwe Hoeckele ,  Franz Xaver Muehlbauer ,  Daniel Porwol ,  Tobias Schmidt ,  Christian Schweiger ,  Carsten Von Koblinski

IPC: H01L23/26 ,  H01L23/00 ,  H01L21/02 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L23/26 ,  H01L23/3135 ,  H01L23/564 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/3025

Abstract: A bonded system includes a reconstituted wafer including a hygroscopic material. A moisture barrier layer is arranged over a surface of the reconstituted wafer. An adhesive layer is arranged over a surface of the moisture barrier opposite the reconstituted wafer. A carrier is arranged over a surface of the adhesive layer opposite the moisture barrier. The adhesive layer adhesively bonds the reconstituted wafer and the carrier together.

Abstract translation: 粘合系统包括包括吸湿材料的重构晶片。 防潮层设置在重构晶片的表面上。 粘合剂层布置在与重构的晶片相对的防潮层的表面上。 载体布置在与防潮层相对的粘合剂层的表面上。 粘合剂层将重构的晶片和载体粘合地结合在一起。