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公开(公告)号：US20210266253A1
公开(公告)日：2021-08-26
申请号：US17239329
申请日：2021-04-23
Applicant: Intel Corporation
Inventor： Shaopeng HE , Haitao KANG , Cunming LIANG , Anjali Singhai JAIN , Parthasarathy SARANGAM , Yadong LI
IPC: H04L12/721 , H04L12/741 , H04L12/707 , H04L12/803 , H04L29/06 , H04L12/46
Abstract: Examples described herein relate to a switch configured to allocate packet processing resources, from a pool of packet processing resources, to multiple applications, wherein the pool of packet processing resources comprise configurable packet processing pipelines of one or more network devices and packet processing resources of one or more servers. In some examples, the configurable packet processing pipelines and the packet processing resources are to perform one or more of: network switch operations, microservice communications, and/or block storage operations. In some examples, the network switch operations comprise one or more of: application of at least one access control list (ACL), packet forwarding, packet routing, and/or Virtual Extensible LAN (VXLAN) or GENEVE termination. In some examples, the microservice communications comprise one or more of: packet routing between microservices and/or load balancing of utilized microservices.
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公开(公告)号：US20240334245A1
公开(公告)日：2024-10-03
申请号：US18737212
申请日：2024-06-07
Applicant: Intel Corporation
Inventor： John J. BROWNE , Andrey CHILIKIN , Elazar COHEN , Joseph HASTING , James CLEE , Jerry PIROG , Jamison D. WHITESELL , Ambalavanar ARULAMBALAM , Anjali Singhai JAIN , Andrew CUNNINGHAM , Ruben DAHAN
CPC classification number: H04W28/06 , H04W28/0273 , H04W28/0289
Abstract: Examples described herein relate to a network interface device that performs: offloading processing of fragments of a packet to an accelerator; processing non-fragmented packets; and prioritizing dropping of fragments of the packet over dropping of non-fragmented packets. Offloading processing of fragments of the packet to the accelerator can include: the accelerator performing: reassembling the fragments of the packet into a first reassembly packet; and based on congestion associated with at least one of the fragments of the packet of the first reassembly packet: dropping fragments of the first reassembly packet associated with one or more flows; halting reassembly of the first reassembly packet; and forwarding a second packet to a host system, wherein the second packet indicates that congestion occurred, identifies one or more impacted flows, and indicates a number of dropped packet fragments.
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公开(公告)号：US20230053744A1
公开(公告)日：2023-02-23
申请号：US17981255
申请日：2022-11-04
Applicant: Intel Corporation
Inventor： Shaopeng HE , Cunming LIANG , Jiang YU , Ziye YANG , Ping YU , Bo CUI , Jingjing WU , Liang MA , Hongjun NI , Zhiguo WEN , Changpeng LIU , Anjali Singhai JAIN , Daniel DALY , Yadong LI
IPC: H04L49/9057 , H04L47/56 , H04L47/34 , H04L1/18 , H04L49/552
Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.
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公开(公告)号：US20220276809A1
公开(公告)日：2022-09-01
申请号：US17747955
申请日：2022-05-18
Applicant: Intel Corporation
Inventor： Keren GUY , Anjali Singhai JAIN , Neerav PARIKH , Kirill KAZATSKER , Arunkumar BALAKRISHNAN , Jayaprakash SHANMUGAM , Hieu TRAN
IPC: G06F3/06
Abstract: Examples described herein relate to a packet processing device. In some examples, the packet processing device includes multiple processors and data plane circuitry. In some examples, a first processor of the multiple processors is to perform a first control plane, a second processor of the multiple processors is to perform a second control plane, and the first and second control planes are to communicate through an interface and wherein the first control plane is to discover capabilities of data plane circuitry and configure operation of the data plane circuitry by the interface.
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公开(公告)号：US20220247696A1
公开(公告)日：2022-08-04
申请号：US17238893
申请日：2021-04-23
Applicant: Intel Corporation
Inventor： Shaopeng HE , Cunming LIANG , Jiang YU , Ziye YANG , Ping YU , Bo CUI , Jingjing WU , Liang MA , Hongjun NI , Zhiguo WEN , Changpeng LIU , Anjali Singhai JAIN , Daniel DALY , Yadong LI
IPC: H04L12/861 , H04L12/875 , H04L12/939 , H04L12/801 , H04L1/18
Abstract: Examples described herein relate to a reliable transport protocol for packet transmission using an Address Family of an eXpress Data Path (AF_XDP) queue framework, wherein the AF_XDP queue framework is to provide a queue for received packet receipt acknowledgements (ACKs). In some examples, an AF_XDP socket is to connect a service with a driver for the network device, one or more queues are associated with the AF_XDP socket, and at least one of the one or more queues comprises a waiting queue for received packet receipt ACKs. In some examples, at least one of the one or more queues is to identify one or more packets for which ACKs have been received. In some examples, the network device is to re-transmit a packet identified by a descriptor in the waiting queue based on non-receipt of an ACK associated with the packet from a receiver.
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Patent Agency Ranking
公开(公告)号：US20220029929A1
公开(公告)日：2022-01-27
申请号：US17492420
申请日：2021-10-01
Applicant: Intel Corporation
Inventor： Anjali Singhai JAIN , Daniel DALY , Sridhar SAMUDRALA , Linden CORNETT , Phani BURRA , Brett CREELEY
IPC: H04L12/923 , H04L12/911 , H04L12/927 , H04L12/851 , H04L29/06
Abstract: Examples described herein relate to one or more processors, when operational, to execute instructions stored in memory device, to cause performance of: execute a driver that is to: negotiate capabilities of hardware with a control plane for a virtualized execution environment and limit capabilities of the hardware available to the virtualized execution environment based on a service level agreement (SLA) associated with the virtualized execution environment. In some examples, the driver is to advertise hardware capabilities requested by the virtualized execution environment. In some examples, the control plane is to set capabilities of a hardware available to the virtualized execution environment based on the SLA.
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公开(公告)号：US20200274952A1
公开(公告)日：2020-08-27
申请号：US16648750
申请日：2018-09-10
Applicant: INTEL CORPORATION
Inventor： Peter P. WASKIEWICZ , Anjali Singhai JAIN , Neerav PARIKH , Parthasarathy SARANGAM
Abstract: Technologies for programming flexible accelerated network pipelines include a comping device with a network controller. The computing device loads a program binary file that includes a packet processing program and a requested hint section. The binary file may be an executable and linkable format (ELF) file with an extended Berkeley packet filter (eBPF) program. The computing device determines a hardware configuration for the network controller based on the requested offload hints and programs the network controller. The network controller processes network packets with the requested offloads, such as packet classification, hashing, checksums, traffic shaping, or other offloads. The network controller returns results of the offloads as hints in metadata. The packet processing program performs actions based on the metadata, such as forwarding, dropping, packet modification, or other actions. The computing device may compile an eBPF source file to generate the binary file. Other embodiments are described and claimed.
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公开(公告)号：US20230259352A1
公开(公告)日：2023-08-17
申请号：US18135566
申请日：2023-04-17
Applicant: Intel Corporation
Inventor： Kirill KAZATSKER , Keren GUY , Anjali Singhai JAIN , Matthew VICK , Jayaprakash SHANMUGAM
Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes a network interface device that includes a network interface, a host interface, and multiple processors. In some examples, a first processor of the multiple processors is to execute a first control plane process and an embedded software update is to occur by: installation and execution of a second control plane process on the first processor and a third control plane process is to cause utilization of the second control plane process.
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19.发明申请公开(公告)号：US20220350714A1
公开(公告)日：2022-11-03
申请号：US17868596
申请日：2022-07-19
Applicant: Intel Corporation
Inventor： Nrupal JANI , Manasi DEVAL , Anjali Singhai JAIN , Parthasarathy SARANGAM , Mitu AGGARWAL , Neerav PARIKH , Alexander H. DUYCK , Kiran PATIL , Rajesh M. SANKARAN , Sanjay K. KUMAR , Utkarsh Y. KAKAIYA , Philip LANTZ , Kun TIAN
Abstract: Examples may include a method of instantiating a virtual machine, instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the virtual device.
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公开(公告)号：US20220337682A1
公开(公告)日：2022-10-20
申请号：US17741332
申请日：2022-05-10
Applicant: Intel Corporation
Abstract: Technologies for programming flexible accelerated network pipelines include a comping device with a network controller. The computing device loads a program binary file that includes a packet processing program and a requested hint section. The binary file may be an executable and linkable format (ELF) file with an extended Berkeley packet filter (eBPF) program. The computing device determines a hardware configuration for the network controller based on the requested offload hints and programs the network controller. The network controller processes network packets with the requested offloads, such as packet classification, hashing, checksums, traffic shaping, or other offloads. The network controller returns results of the offloads as hints in metadata. The packet processing program performs actions based on the metadata, such as forwarding, dropping, packet modification, or other actions. The computing device may compile an eBPF source file to generate the binary file. Other embodiments are described and claimed.
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