Abstract:
A quantum light emitting device includes a carrier substrate, an insulator, a first semiconductor device, a second semiconductor device, a first contact, and a second contact. The quantum light device includes a carrier substrate comprising silicon and configured with an electrically insulating top surface. The quantum light device also includes an insulator configured on the carrier substrate. The quantum light device includes a first semiconductor structure comprising a first semiconductor material configured on the insulator. Further, the quantum light device includes a second semiconductor structure comprising a second semiconductor material configured on the insulator, with an overlap region of the second semiconductor structure electrically coupling with the first semiconductor structure, a dimensional characteristic of the overlap region being configured to limit a photon emission from the overlap region to a single photon.
Abstract:
A calibration apparatus for a tip-enhanced Raman microscope includes a substrate; a two-dimensional Raman scatterer that is mounted on an upper surface of the substrate; and a well-defined topographic structure that is formed at the upper surface of the substrate. The topographic structure may include convex geometric shapes such as triangles and squares arranged in one or more periodic lattices. Calibration is via adjusting a focal length of a laser beam until a signal from a spectrometer repeatedly exhibits a stepped response when a focal point of the laser beam traverses an edge of a two-dimensional Raman scatterer, then adjusting the relative lateral positions of a scanning probe microscope probe tip and the focal point until the signal from the spectrometer and a signal from the scanning probe microscope repeatedly change within an acceptable time delay while the focal point and the probe tip traverse edges of the topographic structure.
Abstract:
A field effect transistor including a dielectric layer on a substrate, a nano-structure material (NSM) layer on the dielectric layer, a source electrode and a drain electrode formed on the NSM layer, a gate dielectric formed on at least a portion of the NSM layer between the source electrode and the drain electrode, a T-shaped gate electrode formed between the source electrode and the drain electrode, where the NSM layer forms a channel of the FET, and a doping layer on the NSM layer extending at least from the sidewall of the source electrode to a first sidewall of the gate dielectric, and from a sidewall of the drain electrode to a second sidewall of the gate dielectric.
Abstract:
A calibration apparatus for a tip-enhanced Raman microscope includes a substrate; a two-dimensional Raman scatterer that is mounted on an upper surface of the substrate; and a well-defined topographic structure that is formed at the upper surface of the substrate. The topographic structure may include convex geometric shapes such as triangles and squares arranged in one or more periodic lattices. Calibration is via adjusting a focal length of a laser beam until a signal from a spectrometer repeatedly exhibits a stepped response when a focal point of the laser beam traverses an edge of a two-dimensional Raman scatterer, then adjusting the relative lateral positions of a scanning probe microscope probe tip and the focal point until the signal from the spectrometer and a signal from the scanning probe microscope repeatedly change within an acceptable time delay while the focal point and the probe tip traverse edges of the topographic structure.
Abstract:
A portable optical measurement system is provided for performing metal trace analysis on a liquid sample. The system includes a sample holder for holding an analysis substrate that includes the liquid sample during the metal trace analysis. The system further includes an ultraviolet (UV) light source for emitting ultraviolet light illuminating the liquid sample. The system also includes an optical sensor for detecting radiation emanating from the liquid sample and converting the detected radiation into an electrical signal. The system additionally includes a microcontroller for processing the electrical signal. The system further includes an external interface for transmitting the processed electrical signal to an external device.
Abstract:
A method of positioning nanomaterials that includes forming a set of electrodes on a substrate, and covering the electrodes and substrate with a single layer of guiding dielectric material. The method may continue with patterning the guiding dielectric to provide dielectric guide features, wherein an exposed portion of the substrate between the dielectric guide features provides a deposition surface. A liquid medium containing at least one nanostructure is applied to the guiding dielectric features and the deposition surface. An electric field produced by the electrodes that is attenuated by the dielectric guide features creates an attractive force that guides the nanostructures to the deposition surface.
Abstract:
A method of detecting a particle comprises magnetizing a particle using an AC magnetic field; generating an AC voltage in a sensing device having a conductive substantially 2-dimensional lattice structure from the magnetized particle; superimposing a DC magnetic field on the generated AC voltage in the sensing device; and measuring an AC Hall voltage at the sensing device.
Abstract:
A semiconductor device includes a substrate having at least one electrically insulating portion. A first graphene electrode is formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode. A second graphene electrode formed on the surface of the substrate. The electrically insulating portion of the substrate is interposed between the bulk portion of the substrate and the second graphene electrode. The second graphene electrode is disposed opposite the first graphene electrode to define an exposed substrate area therebetween.
Abstract:
A semiconductor device includes a substrate having at least one electrically insulating portion. A first graphene electrode is formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode. A second graphene electrode formed on the surface of the substrate. The electrically insulating portion of the substrate is interposed between the bulk portion of the substrate and the second graphene electrode. The second graphene electrode is disposed opposite the first graphene electrode to define an exposed substrate area therebetween.
Abstract:
Aspects of the invention include determining, by a first AFM tip, a first snap-off force of a solid surface immersed in a first fluid, determining, by a second AFM tip, a second snap-off force, determining, by a third AFM tip, a third snap-off force, determining, by the first AFM tip, a fourth snap-off force of a droplet of the first fluid immersed in the second fluid on the solid surface, determining, by the second AFM tip, a fifth snap-off force, determining, by the third AFM tip, a sixth snap-off force, determining a first capillary force for first AFM tip and first droplet based on first snap-off force and fourth snap-off force, determining a second capillary force for second AFM tip and first droplet and a third capillary force for third AFM tip and first droplet, and determining interfacial tension between first fluid and second fluid based on the capillary forces.