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公开(公告)号：US11069854B2
公开(公告)日：2021-07-20
申请号：US16526255
申请日：2019-07-30
Applicant: International Business Machines Corporation
Inventor： Michael Rizzolo , Oscar van der Straten , Alexander Reznicek , Oleg Gluschenkov
Abstract: A low temperature deposited (400° C. or less) dielectric passivation layer is formed on physically exposed surfaces of a material stack including a multilayered magnetic tunnel junction (MTJ) pillar and a top electrode. A laser anneal is then performed to improve the physical and chemical properties of the low temperature deposited dielectric passivation layer, without negatively impacting the multilayered MTJ pillar.
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公开(公告)号：US11049744B2
公开(公告)日：2021-06-29
申请号：US15791451
申请日：2017-10-24
Applicant: International Business Machines Corporation
Inventor： Benjamin D. Briggs , Lawrence A. Clevenger , Nicholas A. Lanzillo , Michael Rizzolo , Theodorus E. Standaert , James Stathis
Abstract: One or more processors determine a predicted sorting bin of a semiconductor device, based on measurement and test data performed on the semiconductor device subsequent to a current metallization layer. A current predicted sorting bin and a target soring bin are determined by a machine learning model for the semiconductor device; the target bin include higher performance semiconductor devices than the predicted sorting bin. The model determines a performance level improvement attainable by adjustments made to process parameters of subsequent metallization layers of the semiconductor device. Adjustments to process parameters are generated, based on measurement and test data of the current metallization layer of semiconductor device, and the adjustment outputs for the process parameters of the subsequent metallization layers of the semiconductor device are made available to the one or more subsequent metallization layer processes by a feed-forward mechanism.
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公开(公告)号：US10978388B2
公开(公告)日：2021-04-13
申请号：US16153901
申请日：2018-10-08
Applicant: International Business Machines Corporation
Inventor： Hari Prasad Amanapu , Prasad Bhosale , Nicholas V. LiCausi , Lars W. Liebmann , James J. McMahon , Cornelius Brown Peethala , Michael Rizzolo
IPC: H01L21/768 , H01L23/522
Abstract: Semiconductor devices including skip via structures and methods of forming the skip via structure include interconnection between two interconnect levels that are separated by at least one other interconnect level, i.e., skip via to connect Mx and Mx+2 interconnect levels, wherein the intervening metallization level (MX+1) is electrically isolated from the skip via. Cap layers in the metallization levels are pre-patterned to provide openings therein generally corresponding to locations of the skip via structure prior to high aspect ratio etching to form the skip via structure.
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公开(公告)号：US10915620B2
公开(公告)日：2021-02-09
申请号：US16503070
申请日：2019-07-03
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Maryam Ashoori , Benjamin D. Briggs , Justin A. Canaperi , Lawrence A. Clevenger , Leigh Anne H. Clevenger , Michael Rizzolo , Spyridon Skordas
IPC: G06F21/35 , G06F3/044 , G06K19/07 , G06K19/077 , G07C9/00 , H04B1/3827
Abstract: A system for a touch screen interface that includes a coating including a plurality of a touch activated microchips; and a projector for projecting a light image onto the coating that is applied to a touch screen substrate. The system also includes an image calibrator that calibrates touch activated microchips in the coating to features of the light image projected onto the coating. The system further includes a receiver for receiving signal from the touch activated microchips when said feature of the light image is activated.
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15.发明授权公开(公告)号：US10903184B2
公开(公告)日：2021-01-26
申请号：US16109182
申请日：2018-08-22
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Jonathan Fry , Tuhin Sinha , Michael Rizzolo , Bassem M. Hamieh
IPC: H01L23/00 , H01L43/02 , H01L23/367 , H01L43/12
Abstract: A thermal interface material and systems and methods for forming a thermal interface material include depositing a layer of a composite material, including at least a first material and a second material, the first material including a carrier fluid and the second material including a filler particle suspended within the first material. A particle manipulator is positioned over the layer of the composite material, the particle manipulator including at least one emitter to apply a particle manipulating field to bias a movement of the filler particles. The second material is redistributed by applying the particle manipulating field to interact with the second material causing the second material to migrate from a surrounding region in the composite material into a high concentration region in the composite material to form a customized thermal interface such that the high concentration region is configured and positioned corresponding to a hotspot.
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Patent Agency Ranking
公开(公告)号：US10901317B2
公开(公告)日：2021-01-26
申请号：US16553854
申请日：2019-08-28
Applicant: International Business Machines Corporation
Inventor： Benjamin D. Briggs , Michael Rizzolo , Ekmini Anuja De Silva , Chih-Chao Yang , Lawrence A. Clevenger
IPC: G03F7/09 , H01L21/3213 , H01L21/027 , H01L21/033 , G03F7/20 , H01L21/266 , H01L21/306 , G03F7/40
Abstract: Extreme ultraviolet (EUV) lithographic patterning methods are provided which implement a surface-hardened EUV resist mask to pattern features in multiple layers. A layer of EUV resist material is formed on a substrate. An EUV resist mask is formed by exposing and developing the layer of EUV resist material. A surface-hardened EUV resist mask is formed by applying a surface treatment to an upper surface of the EUV resist mask to form an etch-resistant layer that is embedded in the upper surface of the EUV resist mask. At least one layer of the substrate is patterned using the surface-hardened EUV resist mask. The surface treatment can be implemented using a neutral atom beam (NAB) process which is configured to implant a chemical or metallic species into the upper surface of the EUV resist mask to form the etch-resistant layer.
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公开(公告)号：US20210020508A1
公开(公告)日：2021-01-21
申请号：US16511179
申请日：2019-07-15
Applicant: International Business Machines Corporation
Inventor： Benjamin D. Briggs , Nicholas Anthony Lanzillo , Michael Rizzolo
Abstract: A method for manufacturing a semiconductor device includes forming a plurality of memory elements on a first interconnect level, and forming an etch stop layer on the plurality of memory elements. A dielectric layer is formed on the etch stop layer, and a portion of the dielectric over the plurality of memory elements is removed to expose a portion of the etch stop layer. The method further includes removing the exposed portion of the etch stop layer. The removing of the portion of the dielectric layer and of the exposed portion of the etch stop layer forms a trench. A metallization layer is formed in the trench on the plurality of memory elements, wherein the metallization layer is part of a second interconnect level.
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公开(公告)号：US10892404B1
公开(公告)日：2021-01-12
申请号：US16506459
申请日：2019-07-09
Applicant: International Business Machines Corporation
Inventor： Ashim Dutta , Saba Zare , Michael Rizzolo , Theodorus E. Standaert , Daniel Charles Edelstein
Abstract: A method of forming a semiconductor structure includes forming a dielectric layer surrounding contacts over a top surface and bevel edge of a substrate, forming a sacrificial buffer layer over the dielectric layer, removing portions of the sacrificial buffer layer formed over the dielectric layer on the top surface of the substrate, and patterning device structures including one or more metal layers over the contacts, wherein patterning the device structures removes portions of the metal layers formed over the top surface of the substrate leaving the metal layers on the bevel edge. The method also includes forming an encapsulation layer and performing a bevel dry etch to remove the encapsulation layer and the metal layers on the bevel edge. The bevel dry etch damages the sacrificial buffer layer on the bevel edge underneath the metal layers. The method further includes removing the damaged sacrificial buffer layer from the bevel edge.
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公开(公告)号：US10796833B2
公开(公告)日：2020-10-06
申请号：US16141195
申请日：2018-09-25
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Nicholas A. Lanzillo , Benjamin D. Briggs , Michael Rizzolo , Theodorus E. Standaert , Lawrence A. Clevenger , James Stathis
Abstract: An electrical device structure including a magnetic tunnel junction structure having a first tunnel junction dielectric layer positioned between a free magnetization layer and a fixed magnetization layer. A magnetization enhancement stack present on the magnetic tunnel junction structure. The magnetization enhancement stack includes a second tunnel junction layer that is in contact with the free magnetization layer of the magnetic tunnel junction structure, a metal contact layer present on the second tunnel junction layer, and a metal electrode layer present on the metal contact layer. A metallic ring on a sidewall of the magnetic enhancement stack, wherein a base of the metallic ring may be in contact with the free magnetization layer of the magnetic tunnel junction structure.
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公开(公告)号：US20200303282A1
公开(公告)日：2020-09-24
申请号：US16358648
申请日：2019-03-19
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Jonathan R. Fry , Michael Rizzolo , Tuhin Sinha
IPC: H01L23/373
Abstract: A semiconductor device that includes a semiconductor substrate having a surface, the surface having several regions having different thermal and/or mechanical requirements; and a composite thermal interface material including several spatially localized thermal interface materials placed on the surface, each of the several thermal interface materials tailored to the different thermal and/or mechanical requirements of each of the regions. Also disclosed is a method of forming the composite thermal interface material.
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