Abstract:
In one embodiment of the present invention, a method of forming a semiconductor device includes performing a test during the forming of the semiconductor device within and/or over a substrate. A first voltage is applied to a first node coupled to a component to be tested in the substrate and a test voltage at a pad coupled to the component to be tested through a second node. The test voltage has a peak voltage higher than the first voltage. The component to be tested is coupled between the first node and the second node. A leakage current is measured through the component to be tested in response to the test voltage. After performing the test, the second node is connected to a functional block in the substrate. The first node is coupled to a third node coupled to the functional block.
Abstract:
A system including circuitry to communicate data across an isolation barrier of a switch driver circuit. For switch driver circuits with galvanic isolation, the circuitry of this disclosure uses the unavoidable common mode voltages caused by the coupling capacitances of the data transfer circuit to evaluate the common mode voltage characteristics, such as the slew rate of a switching event. The switch driver circuit of this disclosure may include a common mode voltage detector to detect and measure features of the unavoidable common mode voltage during a switching event, such as voltage amplitude and slew rate. The common mode voltage detector may couple to a communication interface that provides the common mode voltage information to a controller for the switch driver circuit. In some examples, based on the received information, the controller may adjust the operation of the switching circuit.
Abstract:
Disclosed is an electronic drive circuit and a drive method. The drive circuit includes an output; a first output transistor comprising a control node and a load path, wherein the load path is coupled between the output and a first supply node; a voltage regulator configured to control a voltage across the load path of the first output transistor; and a first driver configured to drive the first output transistor based on a first control signal.
Abstract:
A system including circuitry to communicate data across an isolation barrier of a switch driver circuit. For switch driver circuits with galvanic isolation, the circuitry of this disclosure uses the unavoidable common mode voltages caused by the coupling capacitances of the data transfer circuit to evaluate the common mode voltage characteristics, such as the slew rate of a switching event. The switch driver circuit of this disclosure may include a common mode voltage detector to detect and measure features of the unavoidable common mode voltage during a switching event, such as voltage amplitude and slew rate. The common mode voltage detector may couple to a communication interface that provides the common mode voltage information to a controller for the switch driver circuit. In some examples, based on the received information, the controller may adjust the operation of the switching circuit.
Abstract:
A driver circuit controls a half-bridge that includes a high-side power switch and a low-side power switch. The driver circuit may comprise a high-side compare unit configured to determine a first drain-to-source voltage, wherein the first drain-to-source voltage is associated with the high-side power switch when the high-side power switch is ON, and a low-side compare unit configured to determine a second drain-to-source voltage, wherein the second drain-to-source voltage is associated with the low-side power switch when the low-side power switch is ON. The high-side compare unit may be further configured to determine a third drain-to-source voltage, wherein the third drain-to-source voltage is associated with the high-side power switch when the high-side power switch is OFF, and the low-side compare unit may be further configured to determine a fourth drain-to-source voltage, wherein the fourth drain-to-source voltage is associated with the low-side power switch when the low-side power switch is OFF.
Abstract:
A driver circuit controls a half-bridge that includes a high-side power switch and a low-side power switch. The driver circuit may comprise a high-side compare unit configured to determine a first drain-to-source voltage, wherein the first drain-to-source voltage is associated with the high-side power switch when the high-side power switch is ON, and a low-side compare unit configured to determine a second drain-to-source voltage, wherein the second drain-to-source voltage is associated with the low-side power switch when the low-side power switch is ON. The high-side compare unit may be further configured to determine a third drain-to-source voltage, wherein the third drain-to-source voltage is associated with the high-side power switch when the high-side power switch is OFF, and the low-side compare unit may be further configured to determine a fourth drain-to-source voltage, wherein the fourth drain-to-source voltage is associated with the low-side power switch when the low-side power switch is OFF.
Abstract:
A driver circuit may be configured to control a power switch. The driver circuit may comprise an output pin configured to deliver signals to a gate of the power switch to control an ON/OFF state of the power switch, and a comparator configured to compare a gate-to-source voltage of the power switch to a first threshold when the power switch is ON and to compare the gate-to-source voltage of the power switch to a second threshold when the power switch is OFF.
Abstract:
In accordance with an embodiment, a method includes driving a predetermined load using a driver circuit according to a drive pattern; supplying power to the driver circuit using a switched-mode power supply (SMPS) configured to be coupled to at least one external component; and verifying functionality of the SMPS while driving the predetermined load. Verifying the functionality includes monitoring at least one operating parameter of the SMPS, where the at least one operating parameter of the SMPS is dependent on the drive pattern and the at least one external component, comparing the at least one operating parameter to at least one expected operating parameter to form a first comparison result, and indicating an error condition based on the first comparison result.
Abstract:
In one embodiment of the present invention, a method of forming a semiconductor device includes performing a test during the forming of the semiconductor device within and/or over a substrate. A first voltage is applied to a first node coupled to a component to be tested in the substrate and a test voltage at a pad coupled to the component to be tested through a second node. The test voltage has a peak voltage higher than the first voltage. The component to be tested is coupled between the first node and the second node. A leakage current is measured through the component to be tested in response to the test voltage. After performing the test, the second node is connected to a functional block in the substrate. The first node is coupled to a third node coupled to the functional block.
Abstract:
One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for electrically connecting the base element to the cover element in such that a circuit part to be shielded is arranged within the shielding elements. Since at least one partial section of the shielding elements includes a semiconductor material, a shielding device can be realized completely and cost-effectively in an integrated circuit.