Managing thermal condition of a memory
    11.
    发明授权
    Managing thermal condition of a memory 失效
    管理记忆的热状况

    公开(公告)号:US08566539B2

    公开(公告)日:2013-10-22

    申请号:US12353343

    申请日:2009-01-14

    IPC分类号: G06F13/00

    摘要: A method, system, and computer usable program product for managing thermal condition of a memory are provided in the illustrative embodiments. A condition that a threshold value of a thermal condition of the memory has been exceeded or is likely to be exceeded is identified. A portion of a first workload is identified as being a cause of exceeding the threshold. A second portion of a second workload is identified, the second portion not causing the threshold to be exceeded when executed. A set of operations corresponding to the first portion is interleaved with a second set of operations corresponding to the second portion. The interleaved first and second portions of the first and second workloads are executed, causing the thermal condition of the memory to remain below the threshold. The second portion may use a second memory, a second area of the memory, or a combination thereof when executing.

    摘要翻译: 在说明性实施例中提供了用于管理存储器的热状态的方法,系统和计算机可用程序产品。 识别存储器的热条件的阈值已经被超过或可能被超过的条件。 第一工作负载的一部分被识别为超出阈值的原因。 识别第二工作负载的第二部分,当执行时不引起阈值的第二部分。 对应于第一部分的一组操作与对应于第二部分的第二组操作进行交织。 执行第一和第二工作负载的交织的第一和第二部分,使得存储器的热状态保持在阈值以下。 第二部分可以在执行时使用第二存储器,存储器的第二区域或其组合。

    Symmetric multi-processor lock tracing
    12.
    发明授权
    Symmetric multi-processor lock tracing 失效
    对称多处理器锁跟踪

    公开(公告)号:US08453122B2

    公开(公告)日:2013-05-28

    申请号:US12616005

    申请日:2009-11-10

    IPC分类号: G06F9/44

    摘要: A symmetric multi-processor SMP system includes an SMP processor and operating system OS software that performs automatic SMP lock tracing analysis on an executing application program. System administrators, users or other entities initiate an automatic SMP lock tracing analysis. A particular thread of the executing application program requests and obtains a lock for a memory address pointer. A subsequent thread requests the same memory address pointer lock prior to the particular thread release of that lock. The subsequent thread begins to spin waiting for the release of that address pointer lock. When the subsequent thread reaches a predetermined maximum amount of wait time, MAXSPIN, a lock testing tool in the kernel of the OS detects the MAXSPIN condition. The OS performs a test to determine if the subsequent thread and address pointer lock meet the list of criteria set during initiation of the automatic lock trace method. The OS initiates an SMP lock trace capture automatically if all criteria or the arguments of the lock trace method are met. System administrators, software programmers, users or other entities interpret the results of the SMP lock tracing method that the OS stores in a trace table to determine performance improvements for the executing application program.

    摘要翻译: 对称多处理器SMP系统包括一个SMP处理器和操作系统OS软件,对执行的应用程序执行自动SMP锁跟踪分析。 系统管理员,用户或其他实体启动自动SMP锁跟踪分析。 执行应用程序的特定线程请求并获得用于存储器地址指针的锁。 随后的线程在该锁的特定线程释放之前请求相同的内存地址指针锁。 随后的线程开始旋转等待释放该地址指针锁。 当后续线程达到预定的最大等待时间时,MAXSPIN,OS内核中的锁定测试工具将检测MAXSPIN条件。 OS执行测试以确定后续线程和地址指针锁是否符合在启动自动锁定跟踪方法期间设置的条件列表。 如果符合锁跟踪方法的所有条件或参数,OS将自动启动SMP锁跟踪捕获。 系统管理员,软件程序员,用户或其他实体解释OS存储在跟踪表中的SMP锁跟踪方法的结果,以确定执行的应用程序的性能改进。

    Method and system for distributing unused processor cycles within a dispatch window
    13.
    发明授权
    Method and system for distributing unused processor cycles within a dispatch window 有权
    在调度窗口内分配未使用的处理器周期的方法和系统

    公开(公告)号:US08024738B2

    公开(公告)日:2011-09-20

    申请号:US11467222

    申请日:2006-08-25

    IPC分类号: G06F9/46 G06F15/173 G06F13/00

    CPC分类号: G06F9/5061 G06F9/5083

    摘要: A system for managing processor cycles. A set of uncapped partitions are identified that are ready-to-run in response to unused processor cycles being present in a dispatch window. A number of candidate partitions are identified from the identified set of uncapped partitions based on a history of usage where each identified partition used at least 100 percent of its entitlement in a predefined number of previous dispatch windows. Then, a partition is selected from the number of candidate partitions based on a lottery process of the candidate partitions.

    摘要翻译: 用于管理处理器周期的系统。 识别出一组未加盖的分区,以便响应于调度窗口中存在的未使用的处理器周期而准备运行。 基于所使用的历史记录,从所识别的一组未分配的分区中识别出许多候选分区,其中每个识别的分区在预定数量的先前分派窗口中使用至少100%的授权。 然后,根据候选分区的彩票处理从候选分区的数量中选择一个分区。

    Flexible use of extended cache using a partition cache footprint
    15.
    发明申请
    Flexible use of extended cache using a partition cache footprint 失效
    灵活使用扩展缓存使用分区缓存占用空间

    公开(公告)号:US20120042131A1

    公开(公告)日:2012-02-16

    申请号:US12856682

    申请日:2010-08-15

    IPC分类号: G06F12/08 G06F12/00

    摘要: An approach is provided to identifying cache extension sizes that correspond to different partitions that are running on a computer system. The approach extends a first hardware cache associated with a first processing core that is included in the processor's silicon substrate with a first memory allocation from a system memory area, with the system memory area being external to the silicon substrate and the first memory allocation corresponding to one of the plurality of cache extension sizes that corresponds to one of the partitions that is running on the computer system. The approach further extends a second hardware cache associated with a second processing core also included in the processor's silicon substrate with a second memory allocation from the system memory area with the second memory allocation corresponding to another of the cache extension sizes that corresponds to a different partitions that is being executed by the second processing core.

    摘要翻译: 提供了一种方法来识别对应于在计算机系统上运行的不同分区的高速缓存扩展大小。 该方法利用来自系统存储器区域的第一存储器分配来扩展与包括在处理器的硅衬底中的第一处理核心相关联的第一硬件高速缓存,系统存储器区域在硅衬底外部,并且第一存储器分配对应于 多个缓存扩展大小中的一个对应于在计算机系统上运行的分区之一。 该方法进一步扩展与第二处理核心相关联的第二硬件高速缓存,该第二处理核心还包括在处理器的硅衬底中,具有来自系统存储区域的第二存储器分配,其中第二存储器分配对应于对应于不同分区的另一个高速缓存扩展大小 正在由第二处理核心执行。

    Bus access moderation system
    16.
    发明授权
    Bus access moderation system 失效
    总线访问管理系统

    公开(公告)号:US07962677B2

    公开(公告)日:2011-06-14

    申请号:US12173211

    申请日:2008-07-15

    IPC分类号: G06F13/00

    CPC分类号: G06F9/485 G06F9/4881

    摘要: A method, programmed medium and system are provided in which system bus traffic is moderated with real-time data. The Operating System (OS) is enabled to get information from the firmware (FW) to determine if a resource threshold has been reached. This is accomplished by generating an interrupt to flag the OS when a bus request retry rate has reached a predetermined number. The system firmware plays an integral role in this mechanism, and should be interpreted as a general term which could also include a hypervisor technology. The system firmware will report the bus request retry rate to the operating system by way of, for example, a firmware-generated interrupt. The OS may have something similar to a kernel daemon/service running to intercept the interrupt notice. In the simplest case, the daemon/service will determine if the threshold has been met based on the feedback from the firmware. If so, it will generate a system call that will moderate traffic with an operating system tunable. In one example, the number of simultaneous multithreading (SMT) threads per core will be reduced using a system call. This effectively throttles back the amount of logical threads per core and effectively alleviates the bus request saturation.

    摘要翻译: 提供了一种方法,编程介质和系统,其中系统总线流量由实时数据调节。 操作系统(OS)能够从固件(FW)获取信息,以确定是否已达到资源阈值。 这通过在总线请求重试速率达到预定数量时产生中断来标记OS来实现。 系统固件在此机制中起着不可或缺的作用,应该被解释为一个通用术语,也可以包括管理程序技术。 系统固件将通过例如固件产生的中断来向总线请求重试率报告给操作系统。 操作系统可能与内核守护程序/服务类似,以拦截中断通知。 在最简单的情况下,守护程序/服务将根据固件的反馈来确定阈值是否得到满足。 如果是这样,它将生成一个系统调用,以便通过操作系统可调整来调节流量。 在一个示例中,使用系统调用将减少每个内核的同时多线程(SMT)线程数。 这有效地节省了每个内核的逻辑线程数量,并有效地缓解了总线请求饱和度。

    BUS ACCESS MODERATION SYSTEM
    17.
    发明申请
    BUS ACCESS MODERATION SYSTEM 失效
    总线访问调制系统

    公开(公告)号:US20100017551A1

    公开(公告)日:2010-01-21

    申请号:US12173211

    申请日:2008-07-15

    IPC分类号: G06F13/14

    CPC分类号: G06F9/485 G06F9/4881

    摘要: A method, programmed medium and system are provided in which system bus traffic is moderated with real-time data. The Operating System (OS) is enabled to get information from the firmware (FW) to determine if a resource threshold has been reached. This is accomplished by generating an interrupt to flag the OS when a bus request retry rate has reached a predetermined number. The system firmware plays an integral role in this mechanism, and should be interpreted as a general term which could also include a hypervisor technology. The system firmware will report the bus request retry rate to the operating system by way of, for example, a firmware-generated interrupt. The OS may have something similar to a kernel daemon/service running to intercept the interrupt notice. In the simplest case, the daemon/service will determine if the threshold has been met based on the feedback from the firmware. If so, it will generate a system call that will moderate traffic with an operating system tunable. In one example, the number of simultaneous multithreading (SMT) threads per core will be reduced using a system call. This effectively throttles back the amount of logical threads per core and effectively alleviates the bus request saturation.

    摘要翻译: 提供了一种方法,编程介质和系统,其中系统总线流量由实时数据调节。 操作系统(OS)能够从固件(FW)获取信息,以确定是否已达到资源阈值。 这通过在总线请求重试速率达到预定数量时产生中断来标记OS来实现。 系统固件在此机制中起着不可或缺的作用,应该被解释为一个通用术语,也可以包括管理程序技术。 系统固件将通过例如固件产生的中断来向总线请求重试率报告给操作系统。 操作系统可能与内核守护程序/服务类似,以拦截中断通知。 在最简单的情况下,守护程序/服务将根据固件的反馈来确定阈值是否得到满足。 如果是这样,它将生成一个系统调用,以便通过操作系统可调整来调节流量。 在一个示例中,使用系统调用将减少每个内核的同时多线程(SMT)线程数。 这有效地节省了每个内核的逻辑线程数量,并有效地缓解了总线请求饱和度。

    Flexible use of extended cache using a partition cache footprint
    18.
    发明授权
    Flexible use of extended cache using a partition cache footprint 失效
    灵活使用扩展缓存使用分区缓存占用空间

    公开(公告)号:US08438338B2

    公开(公告)日:2013-05-07

    申请号:US12856682

    申请日:2010-08-15

    IPC分类号: G06F12/02

    摘要: An approach is provided to identifying cache extension sizes that correspond to different partitions that are running on a computer system. The approach extends a first hardware cache associated with a first processing core that is included in the processor's silicon substrate with a first memory allocation from a system memory area, with the system memory area being external to the silicon substrate and the first memory allocation corresponding to one of the plurality of cache extension sizes that corresponds to one of the partitions that is running on the computer system. The approach further extends a second hardware cache associated with a second processing core also included in the processor's silicon substrate with a second memory allocation from the system memory area with the second memory allocation corresponding to another of the cache extension sizes that corresponds to a different partitions that is being executed by the second processing core.

    摘要翻译: 提供了一种方法来识别对应于在计算机系统上运行的不同分区的高速缓存扩展大小。 该方法利用来自系统存储器区域的第一存储器分配来扩展与包括在处理器的硅衬底中的第一处理核心相关联的第一硬件高速缓存,系统存储器区域在硅衬底外部,并且第一存储器分配对应于 多个缓存扩展大小中的一个对应于在计算机系统上运行的分区之一。 该方法进一步扩展与第二处理核心相关联的第二硬件高速缓存,该第二处理核心还包括在处理器的硅衬底中,具有来自系统存储区域的第二存储器分配,其中第二存储器分配对应于对应于不同分区的另一个高速缓存扩展大小 正在由第二处理核心执行。

    Two partition accelerator and application of tiered flash to cache hierarchy in partition acceleration
    19.
    发明授权
    Two partition accelerator and application of tiered flash to cache hierarchy in partition acceleration 失效
    两个分区加速器和分层闪存的应用在分区加速中缓存层次结构

    公开(公告)号:US08417889B2

    公开(公告)日:2013-04-09

    申请号:US12508621

    申请日:2009-07-24

    IPC分类号: G06F13/00

    摘要: An approach is provided to identify a disabled processing core and an active processing core from a set of processing cores included in a processing node. Each of the processing cores is assigned a cache memory. The approach extends a memory map of the cache memory assigned to the active processing core to include the cache memory assigned to the disabled processing core. A first amount of data that is used by a first process is stored by the active processing core to the cache memory assigned to the active processing core. A second amount of data is stored by the active processing core to the cache memory assigned to the inactive processing core using the extended memory map.

    摘要翻译: 提供了一种用于从包括在处理节点中的一组处理核心识别禁用的处理核心和活动处理核心的方法。 每个处理核心被分配一个高速缓冲存储器。 该方法扩展了分配给活动处理核心的高速缓存存储器的存储器映射,以包括分配给禁用处理核心的高速缓存存储器。 由第一进程使用的第一数据量由活动处理核存储到分配给活动处理核的高速缓冲存储器。 第二数据量由活动处理核心使用扩展存储器映射存储到分配给非活动处理核心的缓存存储器。