公开(公告)号：US20050127427A1

公开(公告)日：2005-06-16

申请号：US10986840

申请日：2004-11-15

申请人： Wen-Fang Lee ,  Wei-Lun Hsu ,  Chung-Ping Chao ,  Yu-Hsien Lin

发明人： Wen-Fang Lee ,  Wei-Lun Hsu ,  Chung-Ping Chao ,  Yu-Hsien Lin

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/76 ,  H01L29/792

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/40114 ,  H01L29/42324 ,  H01L29/66825

摘要： Method and structure to improve the gate coupling ratio (GCR) for manufacturing a flash memory device are provided. The method and structure include the following steps. A gate oxide layer, a first semiconductor layer, and an insulating layer are formed sequentially over a provided semiconductor substrate. An etching process is used to etch the insulating layer. A semiconductor spacer is then deposited and used as a self-aligned etching mask. After the self-aligned etching, the insulating layer is removed and an insulating stacked structure is deposited. Finally, a second semiconductor layer is deposited and etched to form the control gate region.

公开(公告)号：US08680625B2

公开(公告)日：2014-03-25

申请号：US12905579

申请日：2010-10-15

申请人： Wei-Han Fan ,  Yu-Hsien Lin ,  Yimin Huang ,  Ming-Huan Tsai ,  Hsueh-Chang Sung ,  Chun-Fai Cheng

发明人： Wei-Han Fan ,  Yu-Hsien Lin ,  Yimin Huang ,  Ming-Huan Tsai ,  Hsueh-Chang Sung ,  Chun-Fai Cheng

IPC分类号： H01L27/088

CPC分类号： H01L29/165 ,  H01L21/28123 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： An exemplary semiconductor device is described, which includes a semiconductor substrate having an active region and an isolation region. The active region has a first edge which interfaces with the isolation region. A gate structure formed on the semiconductor substrate. A spacer element abuts the gate structure and overlies the first edge. In an embodiment, the isolation region is an STI structure. An epitaxy region may be formed adjacent the spacer. In embodiments, this epitaxy region is facet-free.

摘要翻译： 描述了一种示例性的半导体器件，其包括具有有源区和隔离区的半导体衬底。 有源区域具有与隔离区域相接合的第一边缘。 形成在半导体衬底上的栅极结构。 间隔元件邻接栅极结构并覆盖在第一边缘上。 在一个实施例中，隔离区域是STI结构。 可以在间隔物附近形成外延区域。 在实施例中，该外延区域是无面的。

公开(公告)号：US08455952B2

公开(公告)日：2013-06-04

申请号：US12951676

申请日：2010-11-22

申请人： Yun Jing Lin ,  Wei-Han Fan ,  Yu-Hsien Lin ,  Yimin Huang

发明人： Yun Jing Lin ,  Wei-Han Fan ,  Yu-Hsien Lin ,  Yimin Huang

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/41783 ,  H01L21/28518 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/66477 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/78

摘要： The present disclosure describes a semiconductor device including a semiconductor substrate and a gate stack disposed on the semiconductor substrate. A first spacer element is disposed on the substrate abutting the first gate stack. In an embodiment, the first spacer element includes silicon nitride. A second spacer element is adjacent the first spacer element. In an embodiment, the second spacer element includes silicon oxide. A raised source and a first raised drain is provided laterally contacting sidewalls of the second spacer element. In an embodiment, a contact directly interfaces with the second spacer element.

摘要翻译： 本公开描述了一种包括半导体衬底和设置在半导体衬底上的栅极堆叠的半导体器件。 第一间隔元件设置在邻接第一栅极叠层的基板上。 在一个实施例中，第一间隔元件包括氮化硅。 第二间隔元件与第一间隔元件相邻。 在一个实施例中，第二间隔元件包括氧化硅。 凸起的源和第一升高的漏极被设置成横向接触第二间隔元件的侧壁。 在一个实施例中，触点与第二间隔元件直接接触。

公开(公告)号：US08251653B2

公开(公告)日：2012-08-28

申请号：US12210074

申请日：2008-09-12

申请人： Yu-Hsien Lin ,  Kun-Yu Kuo ,  Yu-Hung Huang

发明人： Yu-Hsien Lin ,  Kun-Yu Kuo ,  Yu-Hung Huang

IPC分类号： F04D29/60 ,  F01D25/26 ,  H05K7/20

CPC分类号： F04D29/40 ,  H01L23/4093 ,  H01L23/467 ,  H01L2924/0002 ,  H01L2924/00

摘要： A heat dissipation module is disclosed, including a fan and a fastening structure. The fastening structure includes housing and at least one fixing element. The fixing element is disposed on the sidewall of the housing and has a first protruding part extruding from the inner side of the sidewall. When the fan is assembled with the fastening structure, the first protruding part partially enters into at least one molding hole of the frame of the fan and the first protruding part is placed against the edge of the molding hole.

摘要翻译： 公开了一种散热模块，其包括风扇和紧固结构。 紧固结构包括壳体和至少一个固定元件。 固定元件设置在壳体的侧壁上，并且具有从侧壁的内侧挤出的第一突出部。 当风扇与紧固结构组装时，第一突出部分部分地进入到风扇框架的至少一个模制孔中，并且第一突出部分抵靠模制孔的边缘放置。

公开(公告)号：US20120126331A1

公开(公告)日：2012-05-24

申请号：US12951676

申请日：2010-11-22

申请人： Yun Jing Lin ,  Wei-Han Fan ,  Yu-Hsien Lin ,  Yimin Huang

发明人： Yun Jing Lin ,  Wei-Han Fan ,  Yu-Hsien Lin ,  Yimin Huang

IPC分类号： H01L27/092 ,  H01L21/336 ,  H01L29/772

CPC分类号： H01L29/41783 ,  H01L21/28518 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/66477 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/78

摘要： The present disclosure describes a semiconductor device including a semiconductor substrate and a gate stack disposed on the semiconductor substrate. A first spacer element is disposed on the substrate abutting the first gate stack. In an embodiment, the first spacer element includes silicon nitride. A second spacer element is adjacent the first spacer element. In an embodiment, the second spacer element includes silicon oxide. A raised source and a first raised drain is provided laterally contacting sidewalls of the second spacer element. In an embodiment, a contact directly interfaces with the second spacer element.

摘要翻译： 本公开描述了一种包括半导体衬底和设置在半导体衬底上的栅极堆叠的半导体器件。 第一间隔元件设置在邻接第一栅极叠层的基板上。 在一个实施例中，第一间隔元件包括氮化硅。 第二间隔元件与第一间隔元件相邻。 在一个实施例中，第二间隔元件包括氧化硅。 凸起的源和第一升高的漏极被设置成横向接触第二间隔元件的侧壁。 在一个实施例中，触点与第二间隔元件直接接触。

公开(公告)号：US08071440B2

公开(公告)日：2011-12-06

申请号：US12325847

申请日：2008-12-01

申请人： Po-Sheng Lee ,  Yu-Hsien Lin ,  Wen-Fang Lee

发明人： Po-Sheng Lee ,  Yu-Hsien Lin ,  Wen-Fang Lee

IPC分类号： H01L21/8242

CPC分类号： H01L27/105 ,  H01L27/10808 ,  H01L27/10894 ,  H01L27/10897

摘要： A method of fabricating a dynamic random access memory is provided. First, a substrate at least having a memory device area and a peripheral device area is provided, wherein an isolation structure and a capacitor are formed in the substrate of the memory device area, and an isolation structure and a well are formed in the substrate of the peripheral device area. A first oxide layer is formed on the substrate of the peripheral device area, and a passing gate isolation structure is formed on the substrate of the memory device area at the same time. A second oxide layer is formed on the substrate of the memory device area. And a first transistor is formed on the substrate of the memory device area, a passing gate is formed on the passing gate isolation structure, and a second transistor is formed on the substrate of the peripheral device area.

摘要翻译： 提供一种制造动态随机存取存储器的方法。 首先，提供至少具有存储器件区域和外围器件区域的衬底，其中在存储器件区域的衬底中形成隔离结构和电容器，并且在衬底中形成隔离结构和阱 外围设备区域。 在外围设备区域的基板上形成第一氧化物层，同时在存储器件区域的基板上形成通过栅极隔离结构。 在存储器件区域的衬底上形成第二氧化物层。 并且在存储器件区域的衬底上形成第一晶体管，在通过栅极隔离结构上形成通过栅极，并且在外围器件区域的衬底上形成第二晶体管。

公开(公告)号：US20100136759A1

公开(公告)日：2010-06-03

申请号：US12325847

申请日：2008-12-01

申请人： Po-Sheng Lee ,  Yu-Hsien Lin ,  Wen-Fang Lee

发明人： Po-Sheng Lee ,  Yu-Hsien Lin ,  Wen-Fang Lee

IPC分类号： H01L21/8242

CPC分类号： H01L27/105 ,  H01L27/10808 ,  H01L27/10894 ,  H01L27/10897

摘要： A method of fabricating a dynamic random access memory is provided. First, a substrate at least having a memory device area and a peripheral device area is provided, wherein an isolation structure and a capacitor are formed in the substrate of the memory device area, and an isolation structure and a well are formed in the substrate of the peripheral device area. A first oxide layer is formed on the substrate of the peripheral device area, and a passing gate isolation structure is formed on the substrate of the memory device area at the same time. A second oxide layer is formed on the substrate of the memory device area. And a first transistor is formed on the substrate of the memory device area, a passing gate is formed on the passing gate isolation structure, and a second transistor is formed on the substrate of the peripheral device area.

摘要翻译： 提供一种制造动态随机存取存储器的方法。 首先，提供至少具有存储器件区域和外围器件区域的衬底，其中在存储器件区域的衬底中形成隔离结构和电容器，并且在衬底中形成隔离结构和阱 外围设备区域。 在外围设备区域的基板上形成第一氧化物层，同时在存储器件区域的基板上形成通过栅极隔离结构。 在存储器件区域的衬底上形成第二氧化物层。 并且在存储器件区域的衬底上形成第一晶体管，在通过栅极隔离结构上形成通过栅极，并且在外围器件区域的衬底上形成第二晶体管。

公开(公告)号：US20080130229A1

公开(公告)日：2008-06-05

申请号：US11979807

申请日：2007-11-08

申请人： Chin-Ming Chen ,  Yu-Hung Huang ,  Yu-Hsien Lin

发明人： Chin-Ming Chen ,  Yu-Hung Huang ,  Yu-Hsien Lin

IPC分类号： H05K7/20

CPC分类号： H01L23/467 ,  H01L2924/0002 ,  H01L2924/00

摘要： A heat dissipating module includes a fan and a heat sink. The heat sink comprises a body and at least one movable member. The body comprises a plurality of fins, at least one first slot and at least one second slot. The first and second slots are integrally formed on the body as a single piece. The movable member, rotatably or movably coupled to the first slot, comprises a pivoting portion, an operating portion, a jointing portion and at least one fixing portion. The pivoting portion is rotatably or movably received in the first slot. A first end of the operating portion connects to the pivoting portion, rotating or moving the pivoting portion. The jointing portion, at a second end of the operating portion, selectively connects to or separates from the second slot. The fixing portion protrudes from the pivoting portion, abutting and securing the fan to the heat sink.

摘要翻译： 散热模块包括风扇和散热器。 散热器包括主体和至少一个可动构件。 主体包括多个翅片，至少一个第一狭槽和至少一个第二狭槽。 第一和第二槽一体地形成在主体上作为单件。 可移动或可移动地联接到第一槽的可动构件包括枢转部分，操作部分，接合部分和至少一个固定部分。 枢转部分可旋转地或可移动地容纳在第一槽中。 操作部分的第一端连接到枢转部分，旋转或移动枢转部分。 在操作部分的第二端处的接合部分选择性地连接到第二槽或从第二槽分离。 固定部从枢转部突出，将风扇抵接并固定到散热器。

公开(公告)号：US20060270134A1

公开(公告)日：2006-11-30

申请号：US11381749

申请日：2006-05-05

申请人： Wen-Fang Lee ,  Wei-Lun Hsu ,  Yu-Hsien Lin

发明人： Wen-Fang Lee ,  Wei-Lun Hsu ,  Yu-Hsien Lin

IPC分类号： H01L21/8234 ,  H01L29/94

CPC分类号： H01L29/7835 ,  H01L21/823418 ,  H01L21/823462 ,  H01L29/0653 ,  H01L29/42368 ,  H01L29/66659

摘要： An improved high-voltage process is disclosed. In order to improve the performance in terms of breakdown voltage and to maintain the integrity of the STI structures, the thick gate oxide layer of the high-voltage device area is not etched back before a high-dosage ion doping process. One photo mask is therefore omitted.

摘要翻译： 公开了一种改进的高压工艺。 为了提高击穿电压的性能并且保持STI结构的完整性，高电压器件区域的厚栅极氧化物层在高剂量离子掺杂工艺之前不被回蚀。 因此省略了一张照片。

公开(公告)号：US07061029B1

公开(公告)日：2006-06-13

申请号：US10906570

申请日：2005-02-24

申请人： Wen-Fang Lee ,  Wei-Lun Hsu ,  Yu-Hsien Lin

发明人： Wen-Fang Lee ,  Wei-Lun Hsu ,  Yu-Hsien Lin

IPC分类号： H01L29/745

CPC分类号： H01L29/4238 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/7833

摘要： A high-voltage device structure disposed in a substrate of a first conductivity type includes a first well and a second well each of a second conductivity type, a source diffusion region and a drain diffusion region each of a first length located in the first well and the second well respectively, and a gate of a second length on the substrate surface. Since the gate of the second length is longer than the source diffusion region and the drain diffusion region of the first length, the two sides of the gate have two spare regions. Two windows are located in the spare regions.

摘要翻译： 设置在第一导电类型的衬底中的高电压器件结构包括第一阱和第二阱，第一阱和第二阱中的每一个具有位于第一阱中的第一长度的第二导电类型，源极扩散区和漏极扩散区， 第二阱以及衬底表面上的第二长度的栅极。 由于第二长度的栅极长于第一长度的源极扩散区域和漏极扩散区域，栅极的两侧具有两个备用区域。 两个窗口位于备用区域。