公开(公告)号：US6153262A

公开(公告)日：2000-11-28

申请号：US252121

申请日：1999-02-18

Applicant: Raghvendra K. Pandey ,  Kanwal K. Raina ,  Narayanan Solayappan

Inventor： Raghvendra K. Pandey ,  Kanwal K. Raina ,  Narayanan Solayappan

IPC: C23C14/02 ,  C23C14/06 ,  C23C16/00

CPC classification number: C23C14/024 ,  C23C14/06

Abstract: A method for forming SbSI thin films is formed. In the first step of the method, a substrate (14) is provided. Next a buffer layer (16) is formed on the substrate (14). Then, a SbSI source (12) is provided. The SbSI source (12) and buffer layer (16) with substrate (14) are placed in an ampoule (10). The ampoule is heated in a two-zone furnace (11). This causes the SbSI source (12) to form a vapor which reacts with the buffer layer (14) to form a thin film of SbSI.

Abstract translation: 形成SbSI薄膜的形成方法。 在该方法的第一步骤中，提供衬底（14）。 接下来，在衬底（14）上形成缓冲层（16）。 然后，提供SbSI源（12）。 将具有衬底（14）的SbSI源（12）和缓冲层（16）放置在安瓿（10）中。 将安瓿在双区炉（11）中加热。 这使得SbSI源（12）形成与缓冲层（14）反应形成SbSI薄膜的蒸气。

公开(公告)号：US6107688A

公开(公告)日：2000-08-22

申请号：US290532

申请日：1999-04-12

Applicant: Kanwal K. Raina ,  David H. Wells

Inventor： Kanwal K. Raina ,  David H. Wells

IPC: C23C14/00 ,  C23C14/18 ,  H01L21/285 ,  H01L21/3205 ,  H01L29/45 ,  H01L29/49 ,  H01L23/45 ,  H01L21/44 ,  H01L23/52 ,  H01L29/40

CPC classification number: C23C14/185 ,  C23C14/0057 ,  H01L21/2855 ,  H01L21/32051 ,  H01L29/458 ,  H01L29/4908 ,  Y10S438/937

Abstract: An aluminum-containing film having an oxygen content within the film. The aluminum-containing film is forced by introducing hydrogen gas and oxygen gas along with aragon gas into a sputter deposition vacuum chamber during the sputter deposition of aluminum or aluminum alloys onto a semiconductor substrate. The aluminum-containing film so formed is hillock-free and has low resistivity, relatively low roughness compared to pure aluminum, good mechanical strength, and low residual stress.

Abstract translation: 在膜内具有氧含量的含铝膜。 在将铝或铝合金溅射沉积到半导体衬底上时，通过将氢气和氧气与氩气一起引入溅射沉积真空室来强制含铝膜。 这样形成的含铝膜与纯铝相比具有低电阻率，较低的粗糙度，良好的机械强度和较低的残余应力。

公开(公告)号：US07239075B2

公开(公告)日：2007-07-03

申请号：US11416338

申请日：2006-05-02

Applicant: Kanwal K. Raina ,  Benham Moradi

Inventor： Kanwal K. Raina ,  Benham Moradi

IPC: H01J19/02

CPC classification number: H01J1/30 ,  H01J1/304 ,  H01J1/3044 ,  H01J9/025 ,  H01J31/127 ,  H01J2201/319 ,  H01J2329/00

Abstract: Described herein is a resistor layer for use in field emission display devices and the like, and its method of manufacture. The resistor layer is an amorphous silicon layer doped with nitrogen and phosphorus. Nitrogen concentration in the resistor layer is preferably between about 5 and 15 atomic percent. The presence of nitrogen and phosphorus in the silicon prevents diffusion of Si atoms into metal conductive layers such as aluminum, even up to diffusion and packaging temperatures. The nitrogen and phosphorus also prevent defects from forming at the boundary between the resistor layer and metal conductor. This leads to better control over shorting and improved resistivity in the resistor.

Abstract translation: 这里描述的是用于场发射显示装置等的电阻层及其制造方法。 电阻层是掺杂有氮和磷的非晶硅层。 电阻层中的氮浓度优选为约5至15原子％。 硅中的氮和磷的存在防止Si原子扩散到金属导电层如铝中，甚至达到扩散和封装温度。 氮和磷还可以防止在电阻层和金属导体之间的边界处形成缺陷。 这导致更好地控制电阻器的短路和改善电阻率。

公开(公告)号：US07101586B2

公开(公告)日：2006-09-05

申请号：US10120511

申请日：2002-04-12

Applicant: Kanwal K. Raina

Inventor： Kanwal K. Raina

IPC: B05D5/12 ,  B05D5/06

CPC classification number: H01J9/025

Abstract: A system and method for fabricating a FED device is disclosed. The system and method provide for use of PECVD hydrogenation followed by nitrogen plasma treatment of the tip of the current emitter of the FED device. The use of this process greatly reduces the native oxides in the tip of the current emitter. Such native oxides function as undesirable insulators degrading current emission. By reducing the amount of oxides in the tip, this invention provides for an increase in the current emission of the FED device.

公开(公告)号：US06657376B1

公开(公告)日：2003-12-02

申请号：US09323557

申请日：1999-06-01

Applicant: Kanwal K. Raina ,  Ammar Derraa

Inventor： Kanwal K. Raina ,  Ammar Derraa

IPC: H01J162

CPC classification number: H01J1/3044 ,  H01J9/025

Abstract: In one aspect, an electron emission device comprises a substrate, and a first layer supported by the substrate. The first layer comprises a conductive material. The electron emission display device further comprises an electron emission tip electrically connected with the first layer, and a second layer electrically disposed between the first layer and the electron emission tip. The second layer comprises microcrystalline silicon. In another aspect, the invention encompasses a method of forming an electron emission device. A substrate is provided, and a conductive layer is formed over the substrate. A microcrystalline-silicon-containing layer is formed over the conductive layer, and a resistor layer is formed over the microcrystalline-silicon-containing layer. An emitter tip is formed over the resistor layer. In yet other aspects, the invention encompasses field emission display devices, and methods of forming field emission display devices.

Abstract translation: 一方面，电子发射器件包括衬底和由衬底支撑的第一层。 第一层包括导电材料。 电子发射显示装置还包括与第一层电连接的电子发射尖端，以及电气设置在第一层和电子发射尖端之间的第二层。 第二层包括微晶硅。 另一方面，本发明包括形成电子发射装置的方法。 提供衬底，并且在衬底上形成导电层。 在导电层上形成微晶硅层，在微晶硅层上形成电阻层。 发射极尖端形成在电阻层上。 在其它方面，本发明包括场发射显示装置，以及形成场致发射显示装置的方法。

公开(公告)号：US06348403B1

公开(公告)日：2002-02-19

申请号：US09652423

申请日：2000-08-31

Applicant: Kanwal K. Raina ,  Tianhong Zhang ,  Allen McTeer

Inventor： Kanwal K. Raina ,  Tianhong Zhang ,  Allen McTeer

IPC: H01L214763

CPC classification number: H01L21/7685 ,  H01J1/3044 ,  H01J9/025 ,  H01L21/32051 ,  H01L21/76864 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A multilayer structure is provided which suppresses hillock formation due to post-heat treatment steps in thin aluminum films deposited on other substrates by sandwiching the aluminum film between thin layers of aluminum titanium nitride. The first aluminum titanium nitride layer acts as a compatibilizing layer to provide a better match between the coefficients of thermal expansion of the substrate and aluminum metal layer. The second aluminum titanium nitride layer acts as a cap layer to suppress hillock formation.

Abstract translation: 提供了一种多层结构，其通过将铝膜夹在铝氮化钛薄层之间，通过在其它基板上沉积的薄铝膜中的后热处理步骤来抑制小丘形成。 第一铝氮化钛层用作增容层，以提供基板和铝金属层的热膨胀系数之间更好的匹配。 第二铝氮化钛层用作盖层以抑制小丘形成。

公开(公告)号：US6140701A

公开(公告)日：2000-10-31

申请号：US387133

申请日：1999-08-31

Applicant: Kanwal K. Raina ,  Tianhong Zhang ,  Allen McTeer

Inventor： Kanwal K. Raina ,  Tianhong Zhang ,  Allen McTeer

IPC: H01J1/304 ,  H01J9/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532 ,  H01L21/4763

CPC classification number: H01L21/7685 ,  H01J1/3044 ,  H01J9/025 ,  H01L21/32051 ,  H01L21/76864 ,  H01L23/53223 ,  H01L2924/0002

Abstract: A multilayer structure is provided which suppresses hillock formation due to post-heat treatment steps in thin aluminum films deposited on other substrates by sandwiching the aluminum film between thin layers of aluminum titanium nitride. The first aluminum titanium nitride layer acts as a compatibilizing layer to provide a better match between the coefficients of thermal expansion of the substrate and aluminum metal layer. The second aluminum titanium nitride layer acts as a cap layer to suppress hillock formation.

公开(公告)号：US6139385A

公开(公告)日：2000-10-31

申请号：US431014

申请日：1999-11-01

Applicant: Kanwal K. Raina

Inventor： Kanwal K. Raina

IPC: H01J3/02 ,  H01J9/02 ,  H01J31/12

CPC classification number: H01J3/022 ,  H01J31/127 ,  H01J9/025

Abstract: A field emission device having a gate electrode structure in which a nanocrystalline or microcrystalline silicon layer is positioned over a silicon dioxide dielectric layer. Also disclosed are methods for forming the field emission device. The nanocrystalline or microcrystalline silicon layer forms a bond with the dielectric layer that is sufficiently strong to prevent delamination during a chemical-mechanical planarization operation that is conducted during formation of the field emission device. The nanocrystalline or microcrystalline silicon layer is deposited by PECVD in an atmosphere that contains silane and hydrogen at a ratio in a range from about 1:15 to about 1:40. Multiple field emission devices may be formed and included in a flat panel display for computer monitors, telecommunications devices, and the like.

Abstract translation: 一种场致发射器件，具有其中纳米晶体或微晶硅层位于二氧化硅电介质层上方的栅电极结构。 还公开了形成场发射装置的方法。 纳米晶体或微晶硅层与电介质层形成结合，其足够强以防止在形成场致发射器件期间进行的化学 - 机械平面化操作期间的分层。 纳米晶体或微晶硅层通过PECVD在含有硅烷和氢气的气氛中以约1:15至约1:40的比例沉积。 可以形成多个场致发射器件并将其包括在用于计算机监视器，电信设备等的平板显示器中。

公开(公告)号：US6106351A

公开(公告)日：2000-08-22

申请号：US146056

申请日：1998-09-02

Applicant: Kanwal K. Raina ,  James J. Alwan

Inventor： Kanwal K. Raina ,  James J. Alwan

IPC: H01J9/02 ,  H01J1/02

CPC classification number: H01J9/025

Abstract: The present disclosure describes microelectronic substrate assemblies, and methods for making and using such substrate assemblies in mechanical and chemical-mechanical planarizing processes. A microelectronic substrate assembly is fabricated in accordance with one aspect of the invention by forming a critical layer in a film stack on the substrate and manipulating the critical layer to have a low compression internal stress. The critical layer, more specifically, is a layer that is otherwise in a tensile state or a high compression state without being manipulated to control the internal stress in the critical layer to be in a low compression state. The stress in the critical layer can be manipulated by changing the chemistry, temperature or energy level of the process used to deposit or otherwise form the critical layer. The stress in the critical layer can also be manipulated using heat treatments and other processes. A critical layer composed of chromium, for example, can be manipulated by sputtering chromium in an argon/nitrogen atmosphere instead of solely an argon atmosphere to impart stress controlling elements (nitrogen molecules) into the chromium for producing a low compression chromium layer.

Abstract translation: 本公开描述了微电子衬底组件，以及用于在机械和化学机械平面化工艺中制造和使用这种衬底组件的方法。 根据本发明的一个方面通过在衬底上的膜堆叠中形成临界层并操纵临界层以具有低的压缩内部应力来制造微电子衬底组件。 更具体地说，临界层是否则处于拉伸状态或高压缩状态的层，而不被操纵以控制临界层中的内部应力处于低压缩状态。 临界层中的应力可以通过改变用于沉积或以其他方式形成临界层的方法的化学，温度或能量水平来操纵。 临界层中的应力也可以使用热处理和其他工艺进行操作。 例如，由铬构成的临界层可以通过在氩/氮气氛中溅射铬而不是仅仅氩气来操作，以将应力控制元素（氮分子）赋予铬以产生低压缩铬层。

公开(公告)号：US6057238A

公开(公告)日：2000-05-02

申请号：US45272

申请日：1998-03-20

Applicant: Kanwal K. Raina ,  David H. Wells

Inventor： Kanwal K. Raina ,  David H. Wells

IPC: H01L21/285 ,  H01L21/4763

CPC classification number: H01L21/2855 ,  Y10S438/927 ,  Y10S438/937

Abstract: An aluminum-containing film having an oxygen content within the film. The aluminum-containing film is formed by introducing hydrogen gas and oxygen gas along with argon gas into a sputter deposition vacuum chamber during the sputter deposition of aluminum or aluminum alloys onto a semiconductor substrate. The aluminum-containing film so formed is hillock-free and has low resistivity, relatively low roughness compared to pure aluminum, good mechanical strength, and low residual stress.

Abstract translation: 在膜内具有氧含量的含铝膜。 在铝或铝合金溅射沉积到半导体衬底上时，通过将氢气和氧气与氩气一起引入溅射沉积真空室中形成含铝膜。 这样形成的含铝膜与纯铝相比具有低电阻率，较低的粗糙度，良好的机械强度和较低的残余应力。