公开(公告)号：US20050045989A1

公开(公告)日：2005-03-03

申请号：US10928503

申请日：2004-08-27

Applicant: Tsukasa Fukui ,  Kaoru Ishida

Inventor： Tsukasa Fukui ,  Kaoru Ishida

IPC: H01L21/822 ,  H01L23/522 ,  H01L27/04 ,  H01L27/08 ,  H01Q1/38 ,  H01L21/8222 ,  H01L29/00

CPC classification number: H01L23/5225 ,  H01L23/5227 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01Q1/38 ,  H01L2924/00

Abstract: A semiconductor device includes: a semiconductor substrate in which a semiconductor element is formed; a multilayer structured wiring layer that is provided on the semiconductor substrate, the wiring layer forming a structure connected with the semiconductor element; a spiral inductor that is formed in at least one layer of the wiring layer; and a connection terminal formed in an uppermost layer of the wiring layer for establishing connection from the wiring layer to an outside such as a printed board. A shielding wiring pattern is disposed between the spiral inductor and the connection terminal, the shielding wiring pattern functioning as an electromagnetic shield for the uppermost layer of the wiring layer. The shielding wiring pattern absorbs a change in electrical field caused by a potential change in the connection terminal, providing a shielding structure which suppresses the superposing of noise and an unnecessary signal onto the spiral inductor from the connection terminal.

Abstract translation: 半导体器件包括：形成半导体元件的半导体衬底; 设置在所述半导体基板上的多层结构化布线层，所述布线层形成与所述半导体元件连接的结构; 形成在所述布线层的至少一层中的螺旋电感器; 以及形成在布线层的最上层的连接端子，用于建立从布线层到诸如印刷板的外部的连接。 屏蔽布线图案设置在螺旋电感器和连接端子之间，屏蔽布线图形用作布线层最上层的电磁屏蔽。 屏蔽布线图案吸收由连接端子的电位变化引起的电场变化，提供屏蔽结构，其抑制了从连接端子向螺旋电感器叠加噪声和不必要的信号。

公开(公告)号：US06813317B2

公开(公告)日：2004-11-02

申请号：US09732913

申请日：2000-12-11

Applicant: Kaoru Ishida ,  Shin'ichi Kugou

Inventor： Kaoru Ishida ,  Shin'ichi Kugou

IPC: H04L2728

CPC classification number: H04L5/06

Abstract: A multicarrier transmitting method that includes inputting n input signals, generating carriers corresponding to the n input signals, modulating the carriers into n modulated signals and generating at least one additional signal having a frequency outside band of the n modulated signals. The method also includes adjusting a level and a phase of the generated additional signal, outputting a multiplexed signal by adding up the n modulated signals and the adjusted additional signal, amplifying the multiplexed signal, and then removing the additional signal. The level and the phase of the additional signal are adjusted such that, after predicting a change of a composite vector of the n modulated signals based on an amplitude and a phase of the n carriers, a composite vector obtained after an adding operation can be lower than that before the adding operation when an absolute value of a prediction result exceeds a predetermined level.

Abstract translation: 一种多载波发送方法，包括：输入n个输入信号，生成与所述n个输入信号对应的载波，将所述载波调制为n个调制信号，并生成至少一个具有所述n个调制信号的频率外部频带的附加信号。 该方法还包括调整所产生的附加信号的电平和相位，通过将n个调制信号和经调整的附加信号相加，放大多路复用信号，然后除去附加信号，输出多路复用信号。 调整附加信号的电平和相位，使得在基于n个载波的幅度和相位预测n个调制信号的合成矢量的变化之后，在加法运算之后获得的复合矢量可以较低 当预测结果的绝对值超过预定水平时，加法运算之前的值。

公开(公告)号：US06734727B2

公开(公告)日：2004-05-11

申请号：US10225222

申请日：2002-08-21

Applicant: Kaoru Ishida ,  Naoki Takachi ,  Yuji Saito

Inventor： Kaoru Ishida ,  Naoki Takachi ,  Yuji Saito

IPC: H03F366

CPC classification number: H03F1/3229 ,  H03F1/3235 ,  H03F2201/3212

Abstract: A feedforward amplifier includes a main amplifier for amplifying an input signal, a control circuit for generating a predetermined pilot signal based on the output of a local oscillator and a frequency divider included in the control circuit, and a coupler for combining the input signal or the amplified signal with the pilot signal to generate a combined signal. A first coupler and a second coupler are provided for extracting any distortion component from the combined signal. A vector adjuster, an error amplifier, and a third coupler are provided for removing the extracted distortion component from the combined signal to generate an output signal. An orthogonal detector is provided for using any one of the pilot signal, or the output of the local oscillator, the frequency divider, and the combination of the vector adjuster, error amplifier, and the third coupler to make an adjustment for removing the distortion component.

Abstract translation: 前馈放大器包括用于放大输入信号的主放大器，用于基于本地振荡器的输出和包括在控制电路中的分频器产生预定导频信号的控制电路，以及用于将输入信号或 放大信号与导频信号产生组合信号。 提供第一耦合器和第二耦合器用于从组合信号中提取任何失真分量。 提供矢量调节器，误差放大器和第三耦合器，用于从组合信号中去除提取的失真分量以产生输出信号。 提供正交检测器，用于使用导频信号，本地振荡器的输出，分频器以及矢量调节器，误差放大器和第三耦合器的组合中的任何一个来进行调整以去除失真分量 。

公开(公告)号：US06545542B2

公开(公告)日：2003-04-08

申请号：US09982882

申请日：2001-10-22

Applicant: Toshimitsu Matsuyoshi ,  Kaoru Ishida ,  Masayuki Miyaji ,  Seiji Fujiwara

Inventor： Toshimitsu Matsuyoshi ,  Kaoru Ishida ,  Masayuki Miyaji ,  Seiji Fujiwara

IPC: H03F304

CPC classification number: H03F1/565 ,  H03F1/3205 ,  H03F3/604 ,  H03F2200/06 ,  H03F2200/09

Abstract: A power amplifier that reduces intermodulation distortion generated by the amplifier while reducing the number of parts is provided. A power amplifier comprises a first balun, to which a combined signal combining two signals of different frequencies is inputted, and which outputs, based on the combined signal, the first and the second signal whose phase are opposite; a first amplifier that outputs the first amplified signal containing the differential frequency component comprising the difference of the frequencies of two signals from the first signal; a second amplifier that outputs the second amplified signal containing the component comprising the difference of the frequencies of two signals from the second signal; and a second balun that outputs the combined signal of the first and the second amplified signals. The component contained in the first and the second amplified signal are inputted via the second and the first amplifier, respectively, to reduce the component.

Abstract translation: 提供了减少放大器产生的互调失真同时减少部件数量的功率放大器。 功率放大器包括第一平衡 - 不平衡变换器，组合了两个不同频率的信号的组合信号，并且基于组合信号输出相位相反的第一和第二信号; 第一放大器，其输出包含来自第一信号的两个信号的频率差的差分频率分量的第一放大信号; 第二放大器，输出包含来自第二信号的两个信号的频率差的分量的第二放大信号; 以及第二平衡 - 不平衡转换器，其输出第一和第二放大信号的组合信号。 分别通过第二放大器和第一放大器输入包含在第一和第二放大信号中的分量以减小分量。

公开(公告)号：US06542021B2

公开(公告)日：2003-04-01

申请号：US09759452

申请日：2001-01-16

Applicant: Hiroshi Isono ,  Kaoru Ishida

Inventor： Hiroshi Isono ,  Kaoru Ishida

IPC: H03K1700

CPC classification number: H03K17/76

Abstract: The invention relates to a high frequency switch used in a communication apparatus or the like, such as a portable terminal. The switch includes a first signal terminal, a first diode, the cathode of which is directly or indirectly connected to the first signal terminal, a bias controlling device having an end which is connected to the anode of the first diode, a second signal terminal directly or indirectly connected to the anode of the first diode, an impedance converting device having an end which is directly or indirectly connected to the first signal terminal, a serial circuit having a high frequency voltage dividing device and a second diode, the serial circuit being connected to the other end of the impedance converting device, and a third signal terminal directly or indirectly connected to the other end of the impedance converting device.

Abstract translation: 本发明涉及用于诸如便携式终端的通信设备等中的高频开关。 开关包括第一信号端子，第一二极管，其阴极直接或间接地连接到第一信号端子，偏置控制装置，其端部连接到第一二极管的阳极，第二信号端子直接 或间接地连接到第一二极管的阳极，具有直接或间接连接到第一信号端子的端部的阻抗转换装置，具有高频分压装置和第二二极管的串联电路，串联电路被连接 到阻抗转换装置的另一端，以及直接或间接连接到阻抗转换装置的另一端的第三信号端。

公开(公告)号：US06169461A

公开(公告)日：2001-01-02

申请号：US09123163

申请日：1998-07-27

Applicant: Toshiaki Andoh ,  Makoto Sakakura ,  Takeshi Miura ,  Hiroaki Kosugi ,  Kaoru Ishida

Inventor： Toshiaki Andoh ,  Makoto Sakakura ,  Takeshi Miura ,  Hiroaki Kosugi ,  Kaoru Ishida

IPC: H03B518

CPC classification number: H03B5/1231 ,  H03B5/1218 ,  H03B5/1243 ,  H03B5/1847 ,  H03B2200/004 ,  H03B2200/0086 ,  H03B2200/0098

Abstract: A high-frequency oscillating circuit that is not degraded by external electromagnetic interference. The high-frequency oscillating circuit includes first and second oscillating transistors wherein the bases are connected together directly or via a capacitor having a sufficiently low impedance at an oscillating frequency, and wherein a differential signal output is obtained between the emitters of the first and second oscillating transistors. Also provided is a resonating circuit formed in a module and a separate negative-resistance-generating circuit formed on an integrated circuit for achieving an oscillator that has a high Q factor and a high C/N ratio.

Abstract translation: 高频振荡电路不受外部电磁干扰的影响。 高频振荡电路包括第一和第二振荡晶体管，其中基极直接或通过振荡频率具有足够低阻抗的电容器连接在一起，并且其中在第一和第二振荡器的发射极之间获得差分信号输出 晶体管。 还提供了一种形成在模块中的谐振电路和形成在用于实现具有高Q因子和高C / N比的振荡器的集成电路上的单独的负电阻产生电路。

公开(公告)号：US6054900A

公开(公告)日：2000-04-25

申请号：US265257

申请日：1999-03-09

Applicant: Kaoru Ishida ,  Hiroaki Kosugi ,  Isao Nasuno ,  Kazuhiko Nakayama

Inventor： Kaoru Ishida ,  Hiroaki Kosugi ,  Isao Nasuno ,  Kazuhiko Nakayama

IPC: H01L23/66 ,  H03F3/193 ,  H03F3/60 ,  H01Q11/12 ,  H03F3/68

CPC classification number: H01L24/49 ,  H01L23/66 ,  H03F3/604 ,  H01L2223/6644 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1423

Abstract: A power amplifier MMIC has a first stage amplifier circuit having a transistor and matching circuits provided on input and output sides of the transistor; a plurality of final stage transistors connected in parallel; a first line connected between adjacent gates of the plurality of final stage amplifiers; a second line, connected between adjacent drains of the plurality of final stage amplifiers, for correcting an input signal phase shift caused by the presence of the first line; and an output matching circuit connected to one of connection points between the second line and the drains, and wherein an output of the first stage amplifier circuit is coupled to one gate of a final stage transistor whose drain is not connected to the output matching circuit, and the first stage amplifier circuit and the plurality of final stage transistors are arranged longitudinally alongside each other.

Abstract translation: 功率放大器MMIC具有具有晶体管的第一级放大器电路和设置在晶体管的输入和输出侧的匹配电路; 并联连接的多个末级晶体管; 连接在所述多个最终级放大器的相邻门之间的第一线; 第二线，连接在多个最后级放大器的相邻排水口之间，用于校正由第一线的存在引起的输入信号相移; 以及输出匹配电路，其连接到第二线路和漏极之间的连接点之一，并且其中第一级放大器电路的输出耦合到漏极未连接到输出匹配电路的最终级晶体管的一个栅极， 并且第一级放大器电路和多个最终级晶体管彼此纵向排列。

公开(公告)号：US08886246B2

公开(公告)日：2014-11-11

申请号：US13148239

申请日：2010-11-18

Applicant: Tomoya Urushihara ,  Kaoru Ishida ,  Akihiko Matsuoka

Inventor： Tomoya Urushihara ,  Kaoru Ishida ,  Akihiko Matsuoka

IPC: H04B7/00 ,  H04W52/04 ,  H03F3/24 ,  H03F1/02

CPC classification number: H03F3/24 ,  H03F1/02

Abstract: When switching the mode of a power amplifier between compressed mode and uncompressed mode, accurate transmission power control is realized. A transmission power control method includes setting a power setting value of mode to switch to, such that an inter-mode output power error is canceled (equal to step ST21), calculating an intra-mode output power error from the power setting value of the mode to switch to (equal to step ST23), calculating a gain linearity value based on the power setting value of the mode to switch to and an output power error of the intra-mode (equal to step ST24), and resetting the power setting value of the mode to switch to based on the gain linearity value (equal to steps ST25 and 26).

Abstract translation: 当在压缩模式和未压缩模式之间切换功率放大器的模式时，实现精确的发射功率控制。 发送功率控制方法包括：将模式的功率设定值设定为切换，使得模式间输出功率误差被消除（等于步骤ST21），根据所述功率设定值计算模式内输出功率误差 模式切换到（等于步骤ST23），基于切换模式的功率设定值和帧内模式的输出功率误差（等于步骤ST24）来计算增益线性度值，并且重新设置功率设置 基于增益线性值切换到的模式的值（等于步骤ST25和26）。

公开(公告)号：US08860524B2

公开(公告)日：2014-10-14

申请号：US13382029

申请日：2010-06-17

Applicant: Shigeru Morimoto ,  Kaoru Ishida ,  Maki Nakamura

Inventor： Shigeru Morimoto ,  Kaoru Ishida ,  Maki Nakamura

IPC: H03C1/00 ,  H03F3/24 ,  H03F3/189 ,  H03C5/00 ,  H03F1/02 ,  H04B1/04

CPC classification number: H03F3/24 ,  H03C5/00 ,  H03F1/0266 ,  H03F3/189 ,  H04B1/04

Abstract: A polar modulator of the present invention includes: a first function block which generates an amplitude signal and a phase signal; a second function block which adjusts the signal delay between the amplitude signal and the phase signal; a third function block which allows the low frequency component of the amplitude signal to pass therethrough; a fourth function block which modulates the phase of the phase signal; a fifth function block which outputs a modulation voltage, based on the amplitude signal; a sixth function block which modulates the amplitude of the phase signal, based on the modulation voltage; a seventh function block which measures the temperature of at least one function block; and an eighth function block which calculates a compensation amount for the signal delay, based on the measured temperature. The second function block adjusts the signal delay, based on the compensation amount.

Abstract translation: 本发明的极性调制器包括：产生振幅信号和相位信号的第一功能块; 第二功能块，调整幅度信号和相位信号之间的信号延迟; 允许振幅信号的低频分量通过的第三功能块; 第四功能块，其对相位信号的相位进行调制; 第五功能块，其基于所述振幅信号输出调制电压; 第六功能块，其基于所述调制电压来调制所述相位信号的幅度; 测量至少一个功能块的温度的第七功能块; 以及基于测量的温度计算信号延迟的补偿量的第八功能块。 第二功能块根据补偿量调整信号延迟。

公开(公告)号：US08223886B2

公开(公告)日：2012-07-17

申请号：US12472674

申请日：2009-05-27

Applicant: Ryo Kitamura ,  Kaoru Ishida

Inventor： Ryo Kitamura ,  Kaoru Ishida

IPC: H03C3/00 ,  H03K7/06 ,  H04L27/12

CPC classification number: H04L27/20 ,  H03F1/0261 ,  H03F3/189 ,  H03F3/24 ,  H03F2200/105 ,  H03F2200/222 ,  H03F2200/27 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2200/78 ,  H03G3/3042

Abstract: A transmission circuit switches a bias circuit without allowing a power amplifier to enter a non-bias state. A first bias circuit supplies a first bias signal to a power amplifier, and a second bias circuit supplies a second bias signal to the power amplifier. A first delay circuit delays the switching of an operation of the first bias circuit using a first delay time, and a second delay circuit delays the switching of an operation of the second bias circuit using a second delay time. The first bias circuit and the second bias circuit are both simultaneously operated for a predefined time period, in order to prevent a transistor for amplification from entering a non-bias state when switching an operation mode of the power amplifier.

Abstract translation: 传输电路在不允许功率放大器进入非偏置状态的情况下切换偏置电路。 第一偏置电路将第一偏置信号提供给功率放大器，并且第二偏置电路将第二偏置信号提供给功率放大器。 第一延迟电路使用第一延迟时间延迟第一偏置电路的操作的切换，并且第二延迟电路使用第二延迟时间来延迟第二偏置电路的操作的切换。 第一偏置电路和第二偏置电路都同时操作预定义的时间段，以便在切换功率放大器的操作模式时防止用于放大的晶体管进入非偏置状态。