公开(公告)号：US20110048936A1

公开(公告)日：2011-03-03

申请号：US12861330

申请日：2010-08-23

申请人： Toshihiro KUGIMIYA ,  Katsutoshi Takagi ,  Hitoshi Matsuzaki ,  Kotaro Kitashita ,  Yoichiro Yoneda

发明人： Toshihiro KUGIMIYA ,  Katsutoshi Takagi ,  Hitoshi Matsuzaki ,  Kotaro Kitashita ,  Yoichiro Yoneda

IPC分类号： C23C14/14

CPC分类号： C22C1/0416 ,  B22F2003/248 ,  B22F2998/10 ,  B22F2999/00 ,  C22C21/00 ,  C23C14/3414 ,  B22F9/082 ,  B22F3/1208 ,  B22F3/15 ,  B22F3/17 ,  B22F3/18 ,  B22F3/24 ,  B22F2201/02

摘要： An Al-base alloy sputtering target consisting Ni and one or more rare earth elements, wherein there are 5.0×104/mm2 or more compounds whose aspect ratio is 2.5 or higher and whose equivalent diameter is 0.2 μm or larger, when a cross sectional surface perpendicular to the plane of the target is observed at a magnification of 2000 or higher.

摘要翻译： 包含Ni和一种或多种稀土元素的Al基合金溅射靶，其中当纵横比为2.5以上且当量为0.2μm以上的化合物的截面为5.0×10 4 / mm 2以上时， 以2000或更高的放大倍率观察垂直于靶平面的平面。

公开(公告)号：US08172961B2

公开(公告)日：2012-05-08

申请号：US12861330

申请日：2010-08-23

申请人： Toshihiro Kugimiya ,  Katsutoshi Takagi ,  Hitoshi Matsuzaki ,  Kotaro Kitashita ,  Yoichiro Yoneda

发明人： Toshihiro Kugimiya ,  Katsutoshi Takagi ,  Hitoshi Matsuzaki ,  Kotaro Kitashita ,  Yoichiro Yoneda

IPC分类号： C23C14/14

CPC分类号： C22C1/0416 ,  B22F2003/248 ,  B22F2998/10 ,  B22F2999/00 ,  C22C21/00 ,  C23C14/3414 ,  B22F9/082 ,  B22F3/1208 ,  B22F3/15 ,  B22F3/17 ,  B22F3/18 ,  B22F3/24 ,  B22F2201/02

摘要： An Al-base alloy sputtering target consisting Ni and one or more rare earth elements, wherein there are 5.0×104/mm2 or more compounds whose aspect ratio is 2.5 or higher and whose equivalent diameter is 0.2 μm or larger, when a cross sectional surface perpendicular to the plane of the target is observed at a magnification of 2000 or higher.

摘要翻译： 包含Ni和一种或多种稀土元素的Al基合金溅射靶，其中当纵横比为2.5以上且当量为0.2μm以上的化合物的截面为5.0×10 4 / mm 2以上时， 以2000或更高的放大倍率观察垂直于靶平面的平面。

公开(公告)号：US20060180250A1

公开(公告)日：2006-08-17

申请号：US11341531

申请日：2006-01-30

申请人： Toshihiro Kugimiya ,  Katsutoshi Takagi ,  Hitoshi Matsuzaki ,  Kotaro Kitashita ,  Yoichiro Yoneda

发明人： Toshihiro Kugimiya ,  Katsutoshi Takagi ,  Hitoshi Matsuzaki ,  Kotaro Kitashita ,  Yoichiro Yoneda

IPC分类号： C22C21/00

CPC分类号： C22C1/0416 ,  B22F2003/248 ,  B22F2998/10 ,  B22F2999/00 ,  C22C21/00 ,  C23C14/3414 ,  B22F9/082 ,  B22F3/1208 ,  B22F3/15 ,  B22F3/17 ,  B22F3/18 ,  B22F3/24 ,  B22F2201/02

摘要： An Al-base alloy sputtering target consisting Ni and one or more rare earth elements, wherein there are 5.0×104/mm2 or more compounds whose aspect ratio is 2.5 or higher and whose equivalent diameter is 0.2 μm or larger, when a cross sectional surface perpendicular to the plane of the target is observed at a magnification of 2000 or higher.

摘要翻译： 包含Ni和一种或多种稀土元素的Al基合金溅射靶，其中有5.0×10 4 / mm 2以上的长宽比为2.5或更高的化合物 当等效直径为0.2μm或更大时，当以2000或更高的倍率观察垂直于靶平面的横截面时。

公开(公告)号：US20090211902A1

公开(公告)日：2009-08-27

申请号：US12391487

申请日：2009-02-24

申请人： Hideo FUJII ,  Hitoshi Matsuzaki

发明人： Hideo FUJII ,  Hitoshi Matsuzaki

IPC分类号： C23C14/34

CPC分类号： C22C28/00 ,  B22F2998/10 ,  C22C1/0483 ,  C23C14/3414 ,  B22F9/04 ,  B22F3/105

摘要： The present invention provides a sputtering target in which an occurrence of target cracks can be inhibited. The sputtering target of the invention relates to a sputtering target produced by mixing and sintering a main powder containing In as a main component, which is obtained by pulverizing an ingot consisting of an intermetallic compound, and a sub-powder containing a different component composition from the above-mentioned main powder, wherein a total content of Si, Al and Fe which are unavoidable impurities is 300 ppm by mass or less. Further, the intermetallic compound contains In and at least one selected from Co and Ni.

摘要翻译： 本发明提供可以抑制目标裂纹发生的溅射靶。 本发明的溅射靶是通过将通过将由金属间化合物构成的锭粉碎而得到的主成分和含有不同成分组成的副粉末的主成分混合烧结而成的溅射靶， 上述主要粉末，其中不可避免的杂质的Si，Al和Fe的总含量为300质量ppm以下。 此外，金属间化合物含有In和选自Co和Ni中的至少一种。

公开(公告)号：US5184272A

公开(公告)日：1993-02-02

申请号：US500881

申请日：1990-03-29

申请人： Koichi Suda ,  Hitoshi Matsuzaki ,  Masayuki Wada ,  Shoichi Ozeki

发明人： Koichi Suda ,  Hitoshi Matsuzaki ,  Masayuki Wada ,  Shoichi Ozeki

IPC分类号： H01L27/02 ,  H03K17/06 ,  H03K17/082

CPC分类号： H03K17/063 ,  H01L27/0251 ,  H03K17/0822

摘要： A switching circuit providing detection circuit for detecting a current which flows through a main P-channel MOSFET detection of a floating voltage dependent upon a power supply potential, a reference-voltage generating circuit for generating a reference voltage which is a floating voltage dependent upon the power supply potential and has a constant value independently of variations in power supply potential, a comparator circuit operated on a supply voltage which is a floating voltage dependent upon the power supply potential, for comparing a detected voltage from the detection circuit with the reference voltage from the reference-voltage generating means, to convert the detected voltage into a logic voltage signal (i.e., a bi-level voltage signal and a conversion circuit for converting the logic voltage outputted by the comparator circuit into a voltage measured from a ground potential.

摘要翻译： 提供检测电路的开关电路，用于检测根据电源电位检测流过主P沟道MOSFET检测浮置电压的电流;基准电压产生电路，用于产生基于电压的浮置电压的参考电压 电源电位，并且具有独立于电源电位变化的恒定值，比较器电路在作为取决于电源电位的浮动电压的电源电压下工作，用于将来自检测电路的检测电压与来自 参考电压产生装置将检测到的电压转换为逻辑电压信号（即，双电平电压信号和用于将由比较器电路输出的逻辑电压转换为从地电位测量的电压的转换电路）。

公开(公告)号：US4949137A

公开(公告)日：1990-08-14

申请号：US358880

申请日：1989-05-31

申请人： Hitoshi Matsuzaki ,  Kiyoshi Tukuda ,  Toshikatsu Shirasawa ,  Hideki Miyazaki

发明人： Hitoshi Matsuzaki ,  Kiyoshi Tukuda ,  Toshikatsu Shirasawa ,  Hideki Miyazaki

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/04 ,  H01L27/06 ,  H01L29/08 ,  H01L29/739 ,  H01L29/78 ,  H01L29/8605 ,  H01L29/861

CPC分类号： H01L29/7812 ,  H01L21/76297 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/0694 ,  H01L29/0821 ,  H01L29/7803 ,  H01L29/7809 ,  H01L29/7815 ,  H01L29/8605 ,  H01L29/8611

摘要： A semiconductor device comprises a heavily doped semiconductor layer exposed to both principal surfaces of a semiconductor substrate, a semiconductor element such as a diode, a bipolar transistor, and a MOS transistor, etc. formed on one principal surface side of the semiconductor substrate, a resistor region connected in series with the semiconductor element on the other principal surface side of the semiconductor substrate, and an electrode for current detection kept in contact with the semiconductor layer on the one principal surface side.

摘要翻译： 半导体器件包括暴露于半导体衬底的两个主表面的重掺杂半导体层，形成在半导体衬底的一个主表面侧上的诸如二极管的半导体元件，双极晶体管和MOS晶体管等， 电阻区域与半导体衬底的另一个主表面侧上的半导体元件串联连接，以及用于电流检测的电极，与一个主表面侧上的半导体层保持接触。

公开(公告)号：US4607273A

公开(公告)日：1986-08-19

申请号：US689039

申请日：1985-01-08

申请人： Shuroku Sakurada ,  Hitoshi Matsuzaki ,  Yasuhiko Ikeda ,  Takehiro Ohta

发明人： Shuroku Sakurada ,  Hitoshi Matsuzaki ,  Yasuhiko Ikeda ,  Takehiro Ohta

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L23/482 ,  H01L29/08 ,  H01L29/417 ,  H01L29/74 ,  H01L29/744

CPC分类号： H01L29/41716 ,  H01L23/4824 ,  H01L29/0804 ,  H01L29/0839 ,  H01L29/41708 ,  H01L29/74 ,  H01L2924/0002 ,  Y10S148/14

摘要： A semiconductor device having a semiconductor region of a high impurity concentration which is exposed to one major surface of a semiconductor pellet and has a plurality of split areas, and one main electrode on the major surface which makes low ohmic contact with the semiconductor region and has a bonding pad area for lead connection, comprises the high impurity concentration region underlying the entirety of the main electrode inclusive of the bonding pad, and an insulating film interposed between the bonding pad and the semiconductor region. In a gate turn-off thyristor with a short-circuiting P base region, the semiconductor region constitutes an N emitter region and an area thereof underlying the insulating film prevents the cathode/gate short and current concentration by lateral resistance upon turning off the device by the gate bias. In a bipolar transistor, the semiconductor region constitutes an emitter.

摘要翻译： 一种半导体器件，其具有暴露于半导体芯片的一个主表面并且具有多个分裂区域的高杂质浓度的半导体区域，并且在主表面上的与半导体区域低欧姆接触的一个主电极具有 用于引线连接的接合焊盘区域包括在包括接合焊盘的主电极整体下方的高杂质浓度区域和介于焊盘和半导体区域之间的绝缘膜。 在具有短路P基极区域的栅极截止晶闸管中，半导体区域构成N发射极区域，并且其绝缘膜下方的面积通过横向电阻来防止阴极/栅极的短路和电流集中， 门偏差。 在双极晶体管中，半导体区域构成发射极。

公开(公告)号：US08152976B2

公开(公告)日：2012-04-10

申请号：US12198520

申请日：2008-08-26

申请人： Yuki Tauchi ,  Hitoshi Matsuzaki ,  Naoki Okawa

发明人： Yuki Tauchi ,  Hitoshi Matsuzaki ,  Naoki Okawa

IPC分类号： C23C14/00

CPC分类号： C23C14/3414 ,  B22F2003/244 ,  B22F2998/10 ,  C22C1/0466 ,  C22C5/06 ,  B22F3/24

摘要： The invention relates to an Ag-based alloy sputtering target including at least one element selected from the group consisting of Ti, V, W, Nb, Zr, Ta, Cr, Mo, Mn, Fe, Co, Ni, Cu, Al, and Si in a total amount of 1 to 15% by weight, in which the Ag-based alloy sputtering target has an arithmetic mean roughness (Ra) of 2 μm or more and a maximum height (Rz) of 20 μm or more at a sputtering surface thereof.

摘要翻译： 本发明涉及包含选自Ti，V，W，Nb，Zr，Ta，Cr，Mo，Mn，Fe，Co，Ni，Cu，Al中的至少一种元素的Ag基合金溅射靶， 和Si的总量为1〜15重量％，其中Ag系合金溅射靶的算术平均粗糙度（Ra）为2μm以上，最大高度（Rz）为20μm以上 溅射表面。

公开(公告)号：US20090057141A1

公开(公告)日：2009-03-05

申请号：US12198520

申请日：2008-08-26

申请人： Yuki TAUCHI ,  Hitoshi Matsuzaki ,  Naoki Okawa

发明人： Yuki TAUCHI ,  Hitoshi Matsuzaki ,  Naoki Okawa

IPC分类号： C23C14/34

CPC分类号： C23C14/3414 ,  B22F2003/244 ,  B22F2998/10 ,  C22C1/0466 ,  C22C5/06 ,  B22F3/24

摘要： The invention relates to an Ag-based alloy sputtering target including at least one element selected from the group consisting of Ti, V, W, Nb, Zr, Ta, Cr, Mo, Mn, Fe, Co, Ni, Cu, Al, and Si in a total amount of 1 to 15% by weight, in which the Ag-based alloy sputtering target has an arithmetic mean roughness (Ra) of 2 μm or more and a maximum height (Rz) of 20 μm or more at a sputtering surface thereof.

摘要翻译： 本发明涉及包含选自Ti，V，W，Nb，Zr，Ta，Cr，Mo，Mn，Fe，Co，Ni，Cu，Al中的至少一种元素的Ag基合金溅射靶， 和Si的总量为1〜15重量％，其中Ag系合金溅射靶的算术平均粗糙度（Ra）为2μm以上，最大高度（Rz）为20μm以上， 溅射表面。

公开(公告)号：US4884126A

公开(公告)日：1989-11-28

申请号：US144061

申请日：1988-01-15

申请人： Eiji Harada ,  Hitoshi Matsuzaki ,  Sigeo Tomita ,  Katsunori Chida

发明人： Eiji Harada ,  Hitoshi Matsuzaki ,  Sigeo Tomita ,  Katsunori Chida

IPC分类号： H01L25/04 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L25/18 ,  H01L25/072 ,  H01L2924/0002 ,  H01L2924/3011

摘要： A semiconductor device is disclosed in which at least two semiconductor elements each having a self turn-off function are disposed in a package and connected in paralllel, and in which the semiconductor elements, terminals mounted on the package, and internal wirings for connecting the semiconductor elements to the terminals are arranged in geometrical symmetry, to eliminate the imbalance of current between the semiconductor elements.

摘要翻译： 公开了一种半导体器件，其中每个具有自关断功能的至少两个半导体元件设置在封装中并且以paralllel连接，并且其中半导体元件，安装在封装上的端子和用于连接半导体的内部布线 端子的元件被布置成几何对称，以消除半导体元件之间的电流的不平衡。