公开(公告)号：US20100117711A1

公开(公告)日：2010-05-13

申请号：US12527877

申请日：2007-11-15

申请人： Takuya Suzuki ,  Kenji Kawakami ,  Ko Kanaya ,  Yoichi Kitamura

发明人： Takuya Suzuki ,  Kenji Kawakami ,  Ko Kanaya ,  Yoichi Kitamura

IPC分类号： G06F7/44 ,  H01L23/48

CPC分类号： H03D7/02 ,  H01L23/66 ,  H01L2223/6644 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03D9/0633 ,  H01L2924/00

摘要： A two-terminal semiconductor device is formed on a semiconductor substrate. Two wiring patterns are respectively connected to terminals of the semiconductor device, and two electrode pads are respectively connected to the wiring patterns for connecting a signal input/output circuit formed on a separate substrate. Two parallel wiring patterns are respectively connected to the wiring patterns, and two reactance-circuit connection electrode pads are respectively connected to the parallel wiring patterns for electrically connecting a reactance circuit formed on the separate substrate separately from the signal input/output circuit.

摘要翻译： 在半导体衬底上形成二端子半导体器件。 两个布线图案分别连接到半导体器件的端子，并且两个电极焊盘分别连接到用于连接形成在单独基板上的信号输入/输出电路的布线图案。 两个平行布线图案分别连接到布线图案，并且两个电抗电路连接电极焊盘分别连接到并行布线图案，用于将形成在单独基板上的电抗电路与信号输入/输出电路分开地电连接。

公开(公告)号：US20090237166A1

公开(公告)日：2009-09-24

申请号：US12147542

申请日：2008-06-27

申请人： Seiki Gotou ,  Akira Inoue ,  Ko Kanaya ,  Shinsuke Watanabe

发明人： Seiki Gotou ,  Akira Inoue ,  Ko Kanaya ,  Shinsuke Watanabe

IPC分类号： H03F3/191 ,  H03F3/68

CPC分类号： H03F3/604 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6655 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/19041 ,  H01L2924/19051 ,  H01L2924/30107 ,  H01L2924/3011 ,  H03F2200/237 ,  H03F2200/255 ,  H03F2200/423 ,  H03F2200/429 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A high frequency power amplifier comprises: a multi-finger transistor with transistor cells electrically connected in parallel; an input side matching circuit connected to gate electrodes of the transistor cells; and resonant circuits respectively connected between the gate electrode of a transistor cell and the input side matching circuit. The resonant circuit resonates at a second harmonic of the operating frequency of the transistor or within a predetermined range of frequencies having a center at the second harmonic of the operating frequency, and becomes a high-impedance load at the second harmonic, or an open load.

摘要翻译： 高频功率放大器包括：具有并联电连接的晶体管单元的多指晶体管; 连接到晶体管单元的栅电极的输入侧匹配电路; 以及分别连接在晶体管单元的栅电极和输入侧匹配电路之间的谐振电路。 谐振电路以晶体管的工作频率的二次谐波或在具有工作频率的二次谐波的中心的预定频率范围内谐振，并且变为二次谐波处的高阻抗负载或开路负载 。

公开(公告)号：US06888428B2

公开(公告)日：2005-05-03

申请号：US09972955

申请日：2001-10-10

申请人： Ko Kanaya ,  Shin Chaki

发明人： Ko Kanaya ,  Shin Chaki

IPC分类号： H01L23/12 ,  H03H7/38 ,  H03H7/00 ,  H03F3/60

CPC分类号： H03H7/38 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

摘要： A high frequency semiconductor integrated circuit includes a main circuit, a circuit block, a pad, and a wire. The main circuit includes an input terminal, a transistor, transmission lines, a pad, and an output terminal. The circuit block includes a passive circuit and a capacitor. The pad is disposed close to the circuit block. The wire connects the pad to the pad included in the main circuit. In the high frequency semiconductor integrated circuit, the main circuit outputs an input signal input at the input terminal from the output terminal through the transistor, the transmission line, the pad, and another transmission line. As a result, the high frequency semiconductor integrated circuit can realize various performances and can be used in many applications.

摘要翻译： 高频半导体集成电路包括主电路，电路块，焊盘和电线。 主电路包括输入端子，晶体管，传输线，焊盘和输出端子。 电路块包括无源电路和电容器。 焊盘靠近电路块设置。 电线将焊盘连接到主电路中包含的焊盘。 在高频半导体集成电路中，主电路通过晶体管，传输线，焊盘和另一传输线输出从输出端输入的输入信号。 结果，高频半导体集成电路可以实现各种性能并且可以在许多应用中使用。

公开(公告)号：US08728866B2

公开(公告)日：2014-05-20

申请号：US13079055

申请日：2011-04-04

申请人： Ko Kanaya ,  Yoshihiro Tsukahara ,  Shinsuke Watanabe

发明人： Ko Kanaya ,  Yoshihiro Tsukahara ,  Shinsuke Watanabe

IPC分类号： H01L21/50 ,  H01L23/04

CPC分类号： H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/552 ,  H01L24/06 ,  H01L24/16 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/16235 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method for manufacturing a semiconductor device comprises: forming a circuit pattern and a first metal film on a first major surface of a body wafer; forming a through-hole penetrating the body wafer from a second major surface of the body wafer and reaching the first metal film; forming a second metal film on a part of the second major surface of the body wafer, on an inner wall of the through-hole, and on the first metal film exposed in the through-hole; forming a recess on a first major surface of a lid wafer; forming a third metal film on the first major surface of the lid wafer including inside the recess of the lid wafer; with the recess facing the circuit pattern, and the first metal film contacting the third metal film, joining the lid wafer to the body wafer; and dicing the joined body wafer and lid wafer along the through-hole.

摘要翻译： 一种制造半导体器件的方法包括：在体晶片的第一主表面上形成电路图案和第一金属膜; 从主体晶片的第二主表面形成穿透体晶片的通孔并到达第一金属膜; 在体晶片的第二主表面的一部分上形成第二金属膜，在通孔的内壁上，以及暴露在通孔中的第一金属膜上; 在盖晶片的第一主表面上形成凹部; 在盖晶片的第一主表面上形成第三金属膜，包括在盖晶片的凹部内部; 其中所述凹部面向所述电路图案，并且所述第一金属膜与所述第三金属膜接触，将所述盖晶片接合到所述主体晶片; 并且沿着通孔对接合体晶片和盖晶片进行切割。

公开(公告)号：US20120025366A1

公开(公告)日：2012-02-02

申请号：US13079055

申请日：2011-04-04

申请人： Ko Kanaya ,  Yoshihiro Tsukahara ,  Shinsuke Watanabe

发明人： Ko Kanaya ,  Yoshihiro Tsukahara ,  Shinsuke Watanabe

IPC分类号： H01L23/48 ,  H01L21/78

CPC分类号： H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/552 ,  H01L24/06 ,  H01L24/16 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/16235 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method for manufacturing a semiconductor device comprises: forming a circuit pattern and a first metal film on a first major surface of a body wafer; forming a through-hole penetrating the body wafer from a second major surface of the body wafer and reaching the first metal film; forming a second metal film on a part of the second major surface of the body wafer, on an inner wall of the through-hole, and on the first metal film exposed in the through-hole; forming a recess on a first major surface of a lid wafer; forming a third metal film on the first major surface of the lid wafer including inside the recess of the lid wafer; with the recess facing the circuit pattern, and the first metal film contacting the third metal film, joining the lid wafer to the body wafer; and dicing the joined body wafer and lid wafer along the through-hole.

摘要翻译： 一种制造半导体器件的方法包括：在体晶片的第一主表面上形成电路图案和第一金属膜; 从主体晶片的第二主表面形成穿透体晶片的通孔并到达第一金属膜; 在体晶片的第二主表面的一部分上形成第二金属膜，在通孔的内壁上，以及暴露在通孔中的第一金属膜上; 在盖晶片的第一主表面上形成凹部; 在盖晶片的第一主表面上形成第三金属膜，包括在盖晶片的凹部内部; 其中所述凹部面向所述电路图案，并且所述第一金属膜与所述第三金属膜接触，将所述盖晶片接合到所述主体晶片; 并且沿着通孔对接合体晶片和盖晶片进行切割。

公开(公告)号：US07777571B2

公开(公告)日：2010-08-17

申请号：US12147542

申请日：2008-06-27

申请人： Seiki Gotou ,  Akira Inoue ,  Ko Kanaya ,  Shinsuke Watanabe

发明人： Seiki Gotou ,  Akira Inoue ,  Ko Kanaya ,  Shinsuke Watanabe

IPC分类号： H03F3/191

CPC分类号： H03F3/604 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6655 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/19041 ,  H01L2924/19051 ,  H01L2924/30107 ,  H01L2924/3011 ,  H03F2200/237 ,  H03F2200/255 ,  H03F2200/423 ,  H03F2200/429 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A high frequency power amplifier comprises: a multi-finger transistor with transistor cells electrically connected in parallel; an input side matching circuit connected to gate electrodes of the transistor cells; and resonant circuits respectively connected between the gate electrode of a transistor cell and the input side matching circuit. The resonant circuit resonates at a second harmonic of the operating frequency of the transistor or within a predetermined range of frequencies having a center at the second harmonic of the operating frequency, and becomes a high-impedance load at the second harmonic, or an open load.

摘要翻译： 高频功率放大器包括：具有并联电连接的晶体管单元的多指晶体管; 连接到晶体管单元的栅极的输入侧匹配电路; 以及分别连接在晶体管单元的栅电极和输入侧匹配电路之间的谐振电路。 谐振电路以晶体管的工作频率的二次谐波或在具有工作频率的二次谐波的中心的预定频率范围内谐振，并且变为二次谐波处的高阻抗负载或开路负载 。

公开(公告)号：US07714664B2

公开(公告)日：2010-05-11

申请号：US12421664

申请日：2009-04-10

申请人： Ko Kanaya ,  Seiki Goto ,  Shinsuke Watanabe

发明人： Ko Kanaya ,  Seiki Goto ,  Shinsuke Watanabe

IPC分类号： H03F3/04

CPC分类号： H03F1/226 ,  H03F1/0261 ,  H03F3/1935 ,  H03F2200/18 ,  H03F2200/27 ,  H03F2200/451 ,  H03F2200/534 ,  H03F2200/541

摘要： A cascode circuit for a high-gain or high-output millimeter-wave device that operates with stability. The cascode circuit including two cascode-connected transistors includes: a first high electron mobility transistor (HEMT) including a source that is grounded; a second HEMT including a source connected to a drain of the first HEMT; a reflection gain restricting resistance connected to the gate of the second HEMT, for restricting reflection gain; and an open stub connected to a side of the reflection gain restricting resistance which is opposite the side connected to the second HEMT, for short-circuiting high-frequency signals at a predetermined frequency and nearby frequencies.

摘要翻译： 用于稳定运行的高增益或高输出毫米波器件的共源共栅电路。 包括两个共源共栅连接的晶体管的共源共栅电路包括：包括接地的源的第一高电子迁移率晶体管（HEMT）; 包括连接到第一HEMT的漏极的源的第二HEMT; 连接到第二HEMT的栅极的反射增益限制电阻，用于限制反射增益; 以及连接到反射增益限制电阻的与连接到第二HEMT的一侧相反的一侧的开路短路，用于以预定频率和附近频率短路高频信号。

公开(公告)号：US20090015465A1

公开(公告)日：2009-01-15

申请号：US11957542

申请日：2007-12-17

申请人： Ko Kanaya

发明人： Ko Kanaya

IPC分类号： G01S13/00 ,  G06G7/16

CPC分类号： G01S7/03 ,  G01S7/032 ,  H03D9/0633 ,  H05K1/0237

摘要： A mixer circuit includes: a rat race circuit including a ring-shaped transmission line with a first terminal, a second terminal, a third terminal, and a fourth terminal, the first to fourth terminals being disposed, in that order, clockwise along the transmission line and equally spaced λLO/4 from one another, except that the first terminal is spaced 3*λLO/4 from the fourth terminal, where λLO is the wavelength of the LO signal applied to the mixer circuit; an LO terminal connected to the first terminal; a first diode and a second diode connected in the same polarity to the second terminal and the fourth terminal, respectively; and an RF terminal and an IF terminal both connected to the third terminal. The frequency of the LO signal is one-half of the frequency of the RF signal applied to the mixer circuit.

摘要翻译： 混合器电路包括：大鼠赛跑电路，其包括具有第一端子，第二端子，第三端子和第四端子的环形传输线，所述第一至第四端子以该顺序沿着所述传输顺时针 线和等间隔的λLO/ 4，除了第一端子与第四端子间隔3 *λLO/ 4，其中λLO是施加到混频器电路的LO信号的波长; 连接到第一终端的LO终端; 分别以与第二端子和第四端子相同的极性连接的第一二极管和第二二极管; 以及连接到第三终端的RF终端和IF终端。 LO信号的频率是施加到混频器电路的RF信号的频率的一半。