Abstract:
A back contact solar cell and a method for manufacturing the back contact solar cell are discussed. The back contact solar cell includes a substrate made of crystalline silicon having a first conductivity type, a passivation layer on one side of the substrate, an antireflection layer on the passivation layer, a first electrode on the other side of the substrate, a second electrode on the other side of the substrate and separated from the first electrode, a first semiconductor layer disposed between the first electrode and the substrate and having the first conductivity type, and a second semiconductor layer disposed between the second electrode and the substrate and having a second conductivity type that is opposite to the first conductivity type. The passivation layer includes at least one of amorphous silicon oxide and amorphous silicon carbide.
Abstract:
A solar cell can include a single crystalline semiconductor substrate; an emitter region positioned on an incident surface of the substrate, forming a p-n junction with the single crystalline semiconductor substrate; a first passivation layer positioned on a rear surface of the substrate and made of an oxide material; a back surface field layer positioned on the first passivation layer and forming a hetero junction with the single crystalline semiconductor substrate; a first electrode electrically connected to the emitter region; and a second electrode electrically connected to the single crystalline semiconductor substrate
Abstract:
A method for manufacturing a solar cell, the method includes forming a tunneling layer on a semiconductor substrate; forming a semiconductor layer on the tunneling layer, wherein the forming of the semiconductor layer includes depositing a semiconductor material; forming a capping layer on the semiconductor layer; and forming an electrode connected to the semiconductor layer, wherein the tunneling layer is formed under a temperature higher than room temperature and a pressure lower than atmospheric pressure, wherein a pressure of the forming of the semiconductor layer is smaller than the pressure of the forming of the tunneling layer, wherein the forming of the semiconductor layer further comprises doping the semiconductor layer with dopants, and wherein the capping layer is formed between the forming of the semiconductor layer and the forming of the electrode.
Abstract:
A solar cell panel includes a solar cell; a sealing member for sealing the solar cell; a first cover member positioned at a first surface of the solar cell on a first side of the sealing member; and a second cover member positioned at a second surface of the solar cell on a second side of the sealing member. The first cover member includes a base member and a colored portion having a lower light transmittance than the base member and partially formed on the base member to form a colored region. The second cover member includes a cover portion having a lower brightness than the colored portion and positioned at least an inactive region where the solar cell is not positioned.
Abstract:
Discussed is a solar cell including a single crystalline semiconductor substrate having a first transparent conductive oxide layer positioned on a non-single crystalline emitter layer; a second transparent conductive oxide layer positioned over a rear surface of the single crystalline semiconductor substrate; a first electrode part including a first seed layer directly positioned on the first transparent conductive oxide layer; and a second electrode part including a second seed layer directly positioned on the second transparent conductive oxide layer, wherein the first transparent conductive oxide layer and the first seed layer have different conductivities, and wherein the second transparent conductive oxide layer and the second seed layer have different conductivities.
Abstract:
A solar cell is discussed. The solar cell according to an embodiment includes a semiconductor substrate, a first conductive type region and a second conductive type region disposed on the same side of the semiconductor substrate, wherein at least one of the first and second conductive type regions includes a main region and a boundary region disposed at a peripheral portion of the main region, and the boundary region has at least one of a varying doping concentration and a varying doping depth.
Abstract:
A solar cell module includes a plurality of solar cells comprising a first solar cell and a second solar cell; a ribbon electrically connecting the first solar cell and the second solar cell; and an insulating member positioned between the plurality of solar cells and the ribbon. The insulating member is transparent.
Abstract:
A method for manufacturing a solar cell, includes providing a silicon substrate, forming an oxide layer on a first surface of the silicon substrate, forming a doped polycrystalline silicon layer on the oxide layer, forming a passivation layer on the doped polycrystalline silicon layer, printing a metal paste on the passivation layer, and forming a metal contact connected to the doped polycrystalline silicon layer by firing the metal paste to penetrate the passivation layer.
Abstract:
A method of manufacturing a solar cell, the method includes forming a protective film over a semiconductor substrate, the semiconductor substrate including a base area of a first conductive type and formed of crystalline silicon, wherein the forming of the protective film includes a heat treatment process performed at a heat treatment temperature of approximately 600 degrees Celsius or more under a gas atmosphere including nitrogen, and wherein the heat treatment process includes: a main section, during which the heat treatment temperature is maintained, a temperature increase section before the main section, during which an increase in temperature occurs from an introduction temperature to the heat treatment temperature, and a temperature reduction section after the main section, during which a decrease in temperature occurs from the heat treatment temperature to a discharge temperature.
Abstract:
A solar cell includes a substrate; a first passivation layer on a first surface of the substrate; a first field region on the first surface of the substrate; an anti-reflection layer on the first passivation layer; a second passivation layer on a second surface of the substrate; an emitter region on the second passivation layer, the emitter region forming a p-n junction and a hetero-junction junction with the substrate; a second field region on the second passivation layer, the second field region forming a hetero-junction with the substrate; a first electrode contacted to the emitter region; a second electrode contacted to the second field region; a spacing between the emitter region and the second field region; and a third passivation layer on the second surface of the substrate at the spacing.