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    Methods and systems for limiting data traffic while processing computer system operations
    11.
    发明授权
    Methods and systems for limiting data traffic while processing computer system operations 有权

    公开(公告)号：US12287970B2

    公开(公告)日：2025-04-29

    申请号：US18422162

    申请日：2024-01-25

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Yamin Friedman ,  Idan Burstein ,  Hillel Chapman ,  Gal Yefet

    IPC: G06F3/06 ,  G06F12/06 ,  G06F12/0897

    Abstract: A method and system are provided for limiting unnecessary data traffic on the data busses connecting the various levels of system memory. Some embodiments may include processing an invalidation command associated with a system or network operation requiring temporary storage of data in a local memory area. The invalidation command may comprise a memory location indicator capable of identifying the physical addresses of the associated data in the local memory area. Some embodiments may preclude the data associated with the system or network operation from being written to a main memory by invalidating the memory locations holding the temporary data once the system or network operation has finished utilizing the local memory area.

    Handling transport layer operations received out of order
    16.
    发明授权
    Handling transport layer operations received out of order 有权

    公开(公告)号：US10110518B2

    公开(公告)日：2018-10-23

    申请号：US14132014

    申请日：2013-12-18

    Applicant: Mellanox Technologies Ltd.

    Inventor： Idan Burstein ,  Michael Kagan ,  Noam Bloch ,  Ariel Shachar ,  Hillel Chapman ,  Dror Bohrer ,  Diego Crupnicoff

    IPC: H04L12/861 ,  H04L12/879 ,  H04L29/08 ,  G06F15/173

    Abstract: A method for communication includes receiving at a receiving node over a network from a sending node a succession of data packets belonging to a sequence of transactions, including at least one or more first packets belonging to a first transaction and one or more second packets belonging to a second transaction executed by the sending node after the first transaction, wherein at least one of the second packets is received at the receiving node before at least one of the first packets. At the receiving node, upon receipt of the data packets, data are written from the data packets in the succession to respective locations in a buffer. Execution of the second transaction at the receiving node is delayed until all of the first packets have been received and the first transaction has been executed at the receiving node.

    Associative summing for high performance computing
    17.
    发明授权
    Associative summing for high performance computing 有权

    公开(公告)号：US10033801B2

    公开(公告)日：2018-07-24

    申请号：US15041038

    申请日：2016-02-11

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Hillel Chapman

    IPC: G06F7/00 ,  H04L29/08 ,  G06F7/485

    Abstract: Apparatus, systems, and methods are described, including apparatus that includes one or more communication interfaces for communicating over a communication network, and a processor. The processor is configured to receive, via the communication interfaces, a plurality of numbers, and calculate a sum of the numbers that is independent of an order in which the numbers are received, by (i) converting any of the numbers that are received in a floating-point representation to a derived floating-point representation that includes a plurality of signed integer multiplicands corresponding to different respective orders of magnitude, and (ii) summing the numbers in the derived floating-point representation, by separately summing integer multiplicands that correspond to the same order of magnitude. Other embodiments are also described.

    Accurate Time-Stamping of Outbound Packets
    18.
    发明申请
    Accurate Time-Stamping of Outbound Packets 有权

    公开(公告)号：US20220416925A1

    公开(公告)日：2022-12-29

    申请号：US17359667

    申请日：2021-06-28

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Dotan David Levi ,  Wojciech Wasko ,  Natan Manevich ,  Hillel Chapman ,  Roi Geuli ,  Eyal Serbro

    IPC: H04J3/06

    Abstract: A network device includes a port, a transmission pipeline and a time-stamping circuit. The port is configured for connecting to a network. The transmission pipeline includes multiple pipeline stages and is configured to process packets and to send the packets to the network via the port. The time-stamping circuit is configured to temporarily suspend at least some processing of at least a given packet in the transmission pipeline, to verify whether a pipeline stage having a variable processing delay, located downstream from the time-stamping circuit, meets an emptiness condition, and, only when the pipeline stage meets the emptiness condition, to time-stamp the given packet and resume the processing of the given packet.

    End-to-end enhanced reliable datagram transport
    19.
    发明授权
    End-to-end enhanced reliable datagram transport 有权

    公开(公告)号：US10148581B2

    公开(公告)日：2018-12-04

    申请号：US15168118

    申请日：2016-05-30

    Applicant: Mellanox Technologies Ltd.

    Inventor： Ariel Shahar ,  Hillel Chapman

    IPC: H04L12/801 ,  H04L12/24 ,  H04L5/00

    Abstract: A method for communication includes establishing, using an end-to-end reliable transport context, a channel for exchange of data packets over a network between a first network interface controller (NIC) of a first computing node on the network and a second NIC of a second computing node on the network. The first NIC accepts first and second work items for execution on behalf of different, first and second sender processes, respectively, that are running on the first computing node. The first and second work items are executed by transmitting over the network from the first NIC to the second NIC, using the end-to-end reliable transport context, first and second messages directed to different, first and second receiver process running on the second computing node, using the same end-to-end reliable transport context. The second message is sent before receiving from the second NIC any acknowledgment of the first message.

    End-to-end Enhanced Reliable Datagram Transport
    20.
    发明申请
    End-to-end Enhanced Reliable Datagram Transport 审中-公开

    公开(公告)号：US20170346742A1

    公开(公告)日：2017-11-30

    申请号：US15168118

    申请日：2016-05-30

    Applicant: Mellanox Technologies Ltd.

    Inventor： Ariel Shahar ,  Hillel Chapman

    IPC: H04L12/801 ,  H04L12/24 ,  H04L5/00

    CPC classification number: H04L47/18 ,  H04L5/0055 ,  H04L47/11

    Abstract: A method for communication includes establishing, using an end-to-end reliable transport context, a channel for exchange of data packets over a network between a first network interface controller (NIC) of a first computing node on the network and a second NIC of a second computing node on the network. The first NIC accepts first and second work items for execution on behalf of different, first and second sender processes, respectively, that are running on the first computing node. The first and second work items are executed by transmitting over the network from the first NIC to the second NIC, using the end-to-end reliable transport context, first and second messages directed to different, first and second receiver process running on the second computing node, using the same end-to-end reliable transport context. The second message is sent before receiving from the second NIC any acknowledgment of the first message.

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