公开(公告)号：US07687913B2

公开(公告)日：2010-03-30

申请号：US11676447

申请日：2007-02-19

申请人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

发明人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76826 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/31058 ,  H01L21/76807 ,  H01L21/76814 ,  H01L2924/0002 ,  H01L2924/00

摘要： Often used to reduce the RC delay in integrated circuits are dielectric films of porous organosilicates which have a silica like backbone with alkyl or aryl groups (to add hydrophobicity to the materials and create free volume) attached directly to the Si atoms in the network. Si—R bonds rarely survive an exposure to plasmas or chemical treatments commonly used in processing; this is especially the case in materials with an open cell pore structure. When Si—R bonds are broken, the materials lose hydrophobicity, due to formation of hydrophilic silanols and low dielectric constant is compromised. A method by which the hydrophobicity of the materials is recovered using a novel class of silylation agents which may have the general formula (R2N)XSiR′Y where X and Y are integers from 1 to 3 and 3 to 1 respectively, and where R and R′ are selected from the group of hydrogen, alkyl, aryl, allyl and a vinyl moiety. Mechanical strength of porous organosilicates is also improved as a result of the silylation treatment.

摘要翻译： 通常用于减少集成电路中的RC延迟的是多孔有机硅酸盐的介电膜，其具有二氧化硅像主链与烷基或芳基（以增加材料的疏水性并产生自由体积）直接附着在网络中的Si原子。 Si-R键在暴露于等离子体或通常用于加工的化学处理中很少存活; 这在具有开孔细孔结构的材料中尤其如此。 当Si-R键断裂时，材料由于形成亲水硅烷醇而损失疏水性，并且低介电常数受损。 使用新型甲硅烷基化剂回收材料的疏水性的方法，其可以具有通式（R2N）XSiR'Y，其中X和Y分别为1至3和3至1的整数，并且其中R和 R'选自氢，烷基，芳基，烯丙基和乙烯基部分。 由于甲硅烷基化处理，多孔有机硅酸盐的机械强度也得到改善。

公开(公告)号：US20080254630A1

公开(公告)日：2008-10-16

申请号：US12139803

申请日：2008-06-16

申请人： Daniel C. EDELSTEIN ,  Matthew E. Colburn ,  Edward C. Cooney ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

发明人： Daniel C. EDELSTEIN ,  Matthew E. Colburn ,  Edward C. Cooney ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

IPC分类号： H01L21/311

CPC分类号： B82Y30/00 ,  H01L21/0332 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/7682 ,  H01L21/76829 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

摘要： Method of manufacturing a semiconductor device structure, including the steps of providing a structure having an insulator layer with at least one interconnect, forming a sub lithographic template mask over the insulator layer, and selectively etching the insulator layer through the sub lithographic template mask to form sub lithographic features spanning to a sidewall of the at least one interconnect.

摘要翻译： 制造半导体器件结构的方法，包括以下步骤：提供具有至少一个互连的绝缘体层的结构，在该绝缘体层上形成次级光刻模板掩模，以及通过次级光刻模板掩模选择性地蚀刻绝缘体层以形成 亚光刻特征跨越至少一个互连的侧壁。

公开(公告)号：US07179758B2

公开(公告)日：2007-02-20

申请号：US10853771

申请日：2004-05-25

申请人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

发明人： Nirupama Chakrapani ,  Matthew E. Colburn ,  Christos D. Dimitrakopoulos ,  Dirk Pfeiffer ,  Sampath Purushothaman ,  Satyanarayana V. Nitta

IPC分类号： H01L21/311 ,  H01L21/469 ,  H01L21/31 ,  H01L21/461 ,  H01L21/302

CPC分类号： H01L21/76826 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/31058 ,  H01L21/76807 ,  H01L21/76814 ,  H01L2924/0002 ,  H01L2924/00

摘要： Often used to reduce the RC delay in integrated circuits are dielectric films of porous organosilicates which have a silica like backbone with alkyl or aryl groups (to add hydrophobicity to the materials and create free volume) attached directly to the Si atoms in the network. Si—R bonds rarely survive an exposure to plasmas or chemical treatments commonly used in processing; this is especially the case in materials with an open cell pore structure. When Si—R bonds are broken, the materials lose hydrophobicity, due to formation of hydrophilic silanols and low dielectric constant is compromised. A method by which the hydrophobicity of the materials is recovered using a novel class of silylation agents which may have the general formula (R2N)XSiR′Y where X and Y are integers from 1 to 3 and 3 to 1 respectively, and where R and R′ are selected from the group of hydrogen, alkyl, aryl, allyl and a vinyl moiety. Mechanical strength of porous organosilicates is also improved as a result of the silylation treatment.

摘要翻译： 通常用于减少集成电路中的RC延迟的是多孔有机硅酸盐的介电膜，其具有二氧化硅像主链与烷基或芳基（以增加材料的疏水性并产生自由体积）直接连接到网络中的Si原子。 Si-R键在暴露于等离子体或通常用于加工的化学处理中很少存活; 这在具有开孔细孔结构的材料中尤其如此。 当Si-R键断裂时，材料由于形成亲水硅烷醇而损失疏水性，并且低介电常数受损。 使用新型甲硅烷基化剂回收材料的疏水性的方法，其可以具有通式（R 2 N 2）X SiR'Y 其中X和Y分别为1至3和3至1的整数，并且其中R和R'选自氢，烷基，芳基，烯丙基和乙烯基部分。 由于甲硅烷基化处理，多孔有机硅酸盐的机械强度也得到改善。

公开(公告)号：US20110111590A1

公开(公告)日：2011-05-12

申请号：US13005201

申请日：2011-01-12

申请人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

发明人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

IPC分类号： H01L21/4763

CPC分类号： B82Y30/00 ,  H01L21/0332 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/7682 ,  H01L21/76829 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

摘要： Method of manufacturing a structure which includes the steps of providing a structure having an insulator layer with at least one interconnect, forming a sub lithographic template mask over the insulator layer, and selectively etching the insulator layer through the sub lithographic template mask to form sub lithographic features spanning to a sidewall of the plurality of interconnects.

摘要翻译： 一种制造结构的方法，包括以下步骤：提供具有至少一个互连的绝缘体层的结构，在绝缘体层上形成次级光刻模板掩模，以及通过次级光刻模板掩模选择性地蚀刻绝缘体层以形成次光刻 特征跨越到多个互连的侧壁。

公开(公告)号：US07592685B2

公开(公告)日：2009-09-22

申请号：US11849048

申请日：2007-08-31

申请人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

发明人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

IPC分类号： H01L29/93

CPC分类号： B82Y30/00 ,  H01L21/0332 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/7682 ,  H01L21/76829 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

摘要： Semiconductor structure includes an insulator layer having at least one interconnect feature and at least one gap formed in the insulator layer spanning more than a minimum spacing of interconnects.

摘要翻译： 半导体结构包括具有至少一个互连特征的绝缘体层和形成在绝缘体层中的至少一个间隙，跨越多于互连的最小间隔。

公开(公告)号：US07405147B2

公开(公告)日：2008-07-29

申请号：US10707996

申请日：2004-01-30

申请人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

发明人： Daniel C. Edelstein ,  Matthew E. Colburn ,  Edward C. Cooney, III ,  Timothy J. Dalton ,  John A. Fitzsimmons ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Michael W. Lane ,  Vincent J. McGahay ,  Lee M. Nicholson ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Sujatha Sankaran ,  Thomas M. Shaw ,  Andrew H. Simon ,  Anthony K. Stamper

IPC分类号： H01L21/00

CPC分类号： B82Y30/00 ,  H01L21/0332 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/7682 ,  H01L21/76829 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

摘要： A method for manufacturing a structure includes providing a structure having an insulator layer with at least one interconnect and forming a sub lithographic template mask on the insulator layer. A selective etching step is used for etching the insulator layer through the sub lithographic template mask to form sub lithographic features near the at least one interconnect. A supra lithographic blocking mask may also be utilized. In another aspect, the method includes forming pinch off sections of sub lithographic size formed in a capping layer on the insulator layer. A semiconductor structure includes an insulator layer having at least one interconnect feature and at least one column formed in the insulator layer. A plurality of sub lithographic features formed on a top portion of the insulator layer and communicating with the at least one column is also provided. The plurality of sub lithographic features have a cross section or diameter less than any of the at least one column. A gap may be prohibited from forming on or near scribe lines or vias.

摘要翻译： 一种制造结构的方法包括提供具有至少一个互连的绝缘层的结构，并在绝缘体层上形成次光刻模板掩模。 选择性蚀刻步骤用于通过子光刻模板掩模蚀刻绝缘体层，以在至少一个互连附近形成亚光刻特征。 还可以使用超光刻阻挡掩模。 另一方面，该方法包括形成在绝缘体层上的覆盖层中形成的亚光刻尺寸的夹断部分。 半导体结构包括具有至少一个互连特征的绝缘体层和形成在绝缘体层中的至少一个列。 还提供了形成在绝缘体层的顶部并与至少一个柱连通的多个次级光刻特征。 所述多个亚光刻特征具有小于或小于所述至少一列中的任何一个的横截面或直径。 可能禁止在划线或通孔上或附近形成间隙。

公开(公告)号：US20080220615A1

公开(公告)日：2008-09-11

申请号：US12107889

申请日：2008-04-23

申请人： Timothy A. Brunner ,  Matthew E. Colburn ,  Elbert Huang ,  Muthumanickam Sankarapandian

发明人： Timothy A. Brunner ,  Matthew E. Colburn ,  Elbert Huang ,  Muthumanickam Sankarapandian

IPC分类号： H01L21/027

CPC分类号： H01L21/76834 ,  G03F7/0035 ,  G03F7/2022 ,  H01L21/76849 ,  Y10S430/146

摘要： A method for forming a self-aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material being either photo or thermally sensitive; performing a blanket exposure of the substrate; and allowing at least a portion of the masking material to preferential develop in a fashion that is replicates the existing pattern of the substrate. The existing pattern may be comprised of a first set of regions of the substrate having a first reflectivity and a second set of regions of the substrate having a second reflectivity different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. Structures made in accordance with the method.

摘要翻译： 一种用于在衬底上的现有图案上形成自对准图案的方法，包括在载体中涂覆含有掩蔽材料的溶液的涂层，所述掩蔽材料是光敏的或热敏感的; 进行基板的覆盖曝光; 并且允许至少一部分掩模材料以复制衬底的现有图案的方式优先显影。 现有图案可以由具有第一反射率的第一组基底区域和第二组区域组成，该第二组区域具有不同于第一组成的第二反射率。 第一组区域可以包括一个或多个金属元件，并且第二组区域可以包括电介质。 按照该方法制造的结构。

公开(公告)号：US08119322B2

公开(公告)日：2012-02-21

申请号：US12107889

申请日：2008-04-23

申请人： Timothy A. Brunner ,  Matthew E. Colburn ,  Elbert Huang ,  Muthumanickam Sankarapandian

发明人： Timothy A. Brunner ,  Matthew E. Colburn ,  Elbert Huang ,  Muthumanickam Sankarapandian

IPC分类号： G03F7/00 ,  G03F7/004 ,  G03F7/40

CPC分类号： H01L21/76834 ,  G03F7/0035 ,  G03F7/2022 ,  H01L21/76849 ,  Y10S430/146

摘要： A method for forming a self-aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material being either photo or thermally sensitive; performing a blanket exposure of the substrate; and allowing at least a portion of the masking material to preferential develop in a fashion that is replicates the existing pattern of the substrate. The existing pattern may be comprised of a first set of regions of the substrate having a first reflectivity and a second set of regions of the substrate having a second reflectivity different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. Structures made in accordance with the method.

摘要翻译： 一种用于在衬底上的现有图案上形成自对准图案的方法，包括在载体中涂覆含有掩蔽材料的溶液的涂层，所述掩蔽材料是光敏的或热敏感的; 进行基板的覆盖曝光; 并且允许至少一部分掩模材料以复制衬底的现有图案的方式优先显影。 现有图案可以由具有第一反射率的第一组基底区域和第二组区域组成，该第二组区域具有不同于第一组成的第二反射率。 第一组区域可以包括一个或多个金属元件，并且第二组区域可以包括电介质。 按照该方法制造的结构。

公开(公告)号：US07378738B2

公开(公告)日：2008-05-27

申请号：US10653476

申请日：2003-09-02

申请人： Timothy A. Brunner ,  Matthew E. Colburn ,  Elbert Huang ,  Muthumanickam Sankarapandian

发明人： Timothy A. Brunner ,  Matthew E. Colburn ,  Elbert Huang ,  Muthumanickam Sankarapandian

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76834 ,  G03F7/0035 ,  G03F7/2022 ,  H01L21/76849 ,  Y10S430/146

摘要： A method for forming a self-aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material being either photo or thermally sensitive; performing a blanket exposure of the substrate; and allowing at least a portion of the masking material to preferential develop in a fashion that is replicates the existing pattern of the substrate. The existing pattern may be comprised of a first set of regions of the substrate having a first reflectivity and a second set of regions of the substrate having a second reflectivity different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. Structures made in accordance with the method.

摘要翻译： 一种用于在衬底上的现有图案上形成自对准图案的方法，包括在载体中涂覆含有掩蔽材料的溶液的涂层，所述掩蔽材料是光敏的或热敏感的; 进行基板的覆盖曝光; 并且允许至少一部分掩模材料以复制衬底的现有图案的方式优先显影。 现有图案可以由具有第一反射率的第一组基底区域和第二组区域组成，该第二组区域具有不同于第一组成的第二反射率。 第一组区域可以包括一个或多个金属元件，并且第二组区域可以包括电介质。 按照该方法制造的结构。

公开(公告)号：US08901741B2

公开(公告)日：2014-12-02

申请号：US13531518

申请日：2012-06-23

申请人： Matthew E. Colburn ,  Satya V. Nitta ,  Sampath Purushothaman ,  Charles Black ,  Kathryn Guarini

发明人： Matthew E. Colburn ,  Satya V. Nitta ,  Sampath Purushothaman ,  Charles Black ,  Kathryn Guarini

IPC分类号： H01L23/522 ,  H01L21/311 ,  H01L21/768

CPC分类号： H01L21/31144 ,  H01L21/7682 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming an interconnect structure with nanocolumnar intermetal dielectric is described involving the construction of an interconnect structure using a solid dielectric, and introducing a regular array of vertically aligned nanoscale pores through stencil formation and etching to form a hole array and subsequently pinching off the tops of the hole array with a cap dielectric. Variations of the method and means to construct a multilevel nanocolumnar interconnect structure are also described.

摘要翻译： 描述了一种形成具有纳米柱状金属间电介质的互连结构的方法，涉及使用固体电介质构造互连结构，并通过模板形成和蚀刻引入垂直排列的纳米尺度孔的规则阵列以形成孔阵列并随后夹紧 具有盖电介质的孔阵列的顶部。 还描述了构建多层纳米柱状互连结构的方法和方法的变化。