公开(公告)号：US09666531B2

公开(公告)日：2017-05-30

申请号：US15192060

申请日：2016-06-24

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

IPC: H01L21/467 ,  H01L23/528 ,  H01L23/52 ,  H01L21/768 ,  H01L21/027 ,  H01L21/02 ,  H01L21/308

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

公开(公告)号：US08815752B2

公开(公告)日：2014-08-26

申请号：US13687419

申请日：2012-11-28

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.

Abstract translation: 公开了形成特征的方法。 一种方法包括在衬底结构上的酸性或碱性材料池上形成抗蚀剂，选择性地将抗蚀剂暴露于能量源以形成暴露的抗蚀剂部分和未曝光的抗蚀剂部分，以及将酸性或碱性材料的酸或碱扩散 从池中到抗蚀剂的近端部分。 另一种方法包括在衬底结构中形成多个凹陷。 多个凹部填充有包含酸或碱的池材料。 在池材料上形成抗蚀剂，并且衬底结构和酸或碱扩散到抗蚀剂的相邻部分。 抗蚀剂被图案化以在抗蚀剂中形成开口。 开口包括远离衬底结构的较宽部分和靠近衬底结构的较窄部分。 公开了包括这些特征的附加方法和半导体器件结构。

公开(公告)号：US09842847B2

公开(公告)日：2017-12-12

申请号：US14619243

申请日：2015-02-11

Applicant: Micron Technology, Inc.

Inventor： Hongbin Zhu ,  Lijing Gou ,  Gordon Haller ,  Luan C. Tran

IPC: H01L27/1156 ,  H01L27/11556 ,  H01L27/11582

CPC classification number: H01L27/11556 ,  H01L27/11582

Abstract: Some embodiments include a string of charge storage devices formed along a vertical channel of semiconductor material; a gate region of a drain select gate (SGD) transistor, the gate region at least partially surrounding the vertical channel; a dielectric barrier formed in the gate region; a first isolation layer formed above the gate region and the dielectric barrier; a drain region of the SGD transistor formed above the vertical channel; and a second isolation layer formed above the first isolation layer and the drain region, wherein the second isolation layer includes a conductive contact in electrical contact with the drain region of the SGD transistor. Additional apparatus and methods are disclosed.

公开(公告)号：US09142504B2

公开(公告)日：2015-09-22

申请号：US14457658

申请日：2014-08-12

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

IPC: H01L29/06 ,  H01L23/52 ,  H01L21/467 ,  H01L21/768 ,  H01L21/027

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.

Abstract translation: 公开了形成特征的方法。 一种方法包括在衬底结构上的酸性或碱性材料池上形成抗蚀剂，选择性地将抗蚀剂暴露于能量源以形成暴露的抗蚀剂部分和未曝光的抗蚀剂部分，以及将酸性或碱性材料的酸或碱扩散 从池中到抗蚀剂的近端部分。 另一种方法包括在衬底结构中形成多个凹陷。 多个凹部填充有包含酸或碱的池材料。 在池材料上形成抗蚀剂，并且衬底结构和酸或碱扩散到抗蚀剂的相邻部分。 抗蚀剂被图案化以在抗蚀剂中形成开口。 开口包括远离衬底结构的较宽部分和靠近衬底结构的较窄部分。 公开了包括这些特征的附加方法和半导体器件结构。

公开(公告)号：US09140977B2

公开(公告)日：2015-09-22

申请号：US13892711

申请日：2013-05-13

Applicant: Micron Technology, Inc.

Inventor： Yuan He ,  Kaveri Jain ,  Lijing Gou ,  Zishu Zhang ,  Anton J. deVilliers ,  Michael Hyatt ,  Jianming Zhou ,  Scott L. Light ,  Dan B. Millward

IPC: G03F1/36 ,  G03F1/38 ,  G03F1/54

CPC classification number: G03F1/38 ,  G03F1/50 ,  G03F1/54 ,  Y10T29/49002

Abstract: An imaging device comprising a first region and a second region. Imaging features in the first region and assist features in the second region are substantially the same size as one another and are formed substantially on pitch. Methods of forming an imaging device and methods of forming a semiconductor device structure are also disclosed.

Abstract translation: 一种成像装置，包括第一区域和第二区域。 第一区域中的成像特征和第二区域中的辅助特征基本上彼此相同，并且基本上在间距上形成。 还公开了形成成像装置的方法和形成半导体器件结构的方法。

公开(公告)号：US20140145311A1

公开(公告)日：2014-05-29

申请号：US13687419

申请日：2012-11-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

IPC: H01L21/467 ,  H01L23/00 ,  H01L21/441

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.

Abstract translation: 公开了形成特征的方法。 一种方法包括在衬底结构上的酸性或碱性材料池上形成抗蚀剂，选择性地将抗蚀剂暴露于能量源以形成暴露的抗蚀剂部分和未曝光的抗蚀剂部分，以及将酸性或碱性材料的酸或碱扩散 从池中到抗蚀剂的近端部分。 另一种方法包括在衬底结构中形成多个凹陷。 多个凹部填充有包含酸或碱的池材料。 在池材料上形成抗蚀剂，并且衬底结构和酸或碱扩散到抗蚀剂的相邻部分。 抗蚀剂被图案化以在抗蚀剂中形成开口。 开口包括远离衬底结构的较宽部分和靠近衬底结构的较窄部分。 公开了包括这些特征的附加方法和半导体器件结构。

公开(公告)号：US20180069015A1

公开(公告)日：2018-03-08

申请号：US15808468

申请日：2017-11-09

Applicant: Micron Technology, Inc.

Inventor： Hongbin Zhu ,  Lijing Gou ,  Gordon Haller ,  Luan C. Tran

IPC: H01L27/11556 ,  H01L27/11582

CPC classification number: H01L27/11556 ,  H01L21/28035 ,  H01L21/28282 ,  H01L21/302 ,  H01L21/30625 ,  H01L21/31105 ,  H01L21/32055 ,  H01L27/11582

Abstract: Some embodiments include a string of charge storage devices formed along a vertical channel of semiconductor material; a gate region of a drain select gate (SGD) transistor, the gate region at least partially surrounding the vertical channel; a dielectric barrier formed in the gate region; a first isolation layer formed above the gate region and the dielectric barrier; a drain region of the SGD transistor formed above the vertical channel; and a second isolation layer formed above the first isolation layer and the drain region, wherein the second isolation layer includes a conductive contact in electrical contact with the drain region of the SGD transistor. Additional apparatus and methods are disclosed.

公开(公告)号：US20160307839A1

公开(公告)日：2016-10-20

申请号：US15192060

申请日：2016-06-24

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

IPC: H01L23/528 ,  H01L21/308 ,  H01L21/768

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

Abstract translation: 形成半导体结构的方法包括在衬底结构中形成酸性或碱性材料的集合体。 在酸性或碱性材料和衬底结构的池之上形成抗蚀剂。 酸性或碱性材料从池中扩散到靠近池的抗蚀剂的部分，而不是远离池的抗蚀剂的部分。 然后，与远离池的抗蚀剂部分相比，抗蚀剂暴露于显影剂以除去更靠近池的抗蚀剂部分，以在抗蚀剂中形成开口。 开口具有靠近基板结构的较宽部分和远离基板结构的较窄部分。 该方法还可以包括在抗蚀剂的开口中形成特征。 这些特征具有靠近基底结构的较宽部分和远离基底结构的较窄部分。

公开(公告)号：US09396996B2

公开(公告)日：2016-07-19

申请号：US14848912

申请日：2015-09-09

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue (Gloria) Chen ,  Anton J. deVilliers

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/768 ,  H01L21/467 ,  H01L23/52 ,  H01L21/027 ,  H01L21/02 ,  H01L21/308

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

Abstract translation: 形成半导体结构的方法包括在衬底结构中形成酸性或碱性材料的集合体。 在酸性或碱性材料和衬底结构的池之上形成抗蚀剂。 酸性或碱性材料从池中扩散到靠近池的抗蚀剂的部分，而不是远离池的抗蚀剂的部分。 然后，与远离池的抗蚀剂部分相比，抗蚀剂暴露于显影剂以除去更靠近池的抗蚀剂部分，以在抗蚀剂中形成开口。 开口具有靠近基板结构的较宽部分和远离基板结构的较窄部分。 该方法还可以包括在抗蚀剂的开口中形成特征。 这些特征具有靠近基底结构的较宽部分和远离基底结构的较窄部分。

公开(公告)号：US20150380307A1

公开(公告)日：2015-12-31

申请号：US14848912

申请日：2015-09-09

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue (Gloria) Chen ,  Anton J. deVilliers

IPC: H01L21/768 ,  H01L21/308 ,  H01L21/02

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

Abstract translation: 形成半导体结构的方法包括在衬底结构中形成酸性或碱性材料的集合体。 在酸性或碱性材料和衬底结构的池之上形成抗蚀剂。 酸性或碱性材料从池中扩散到靠近池的抗蚀剂的部分，而不是远离池的抗蚀剂的部分。 然后，与远离池的抗蚀剂部分相比，抗蚀剂暴露于显影剂以除去更靠近池的抗蚀剂部分，以在抗蚀剂中形成开口。 开口具有靠近基板结构的较宽部分和远离基板结构的较窄部分。 该方法还可以包括在抗蚀剂的开口中形成特征。 这些特征具有靠近基底结构的较宽部分和远离基底结构的较窄部分。