公开(公告)号：US20180366406A1

公开(公告)日：2018-12-20

申请号：US16042255

申请日：2018-07-23

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue (Gloria) Chen ,  Anton J. deVilliers

IPC: H01L23/528 ,  H01L21/467 ,  H01L23/52 ,  H01L21/768 ,  H01L21/027 ,  H01L21/308 ,  H01L21/02

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

公开(公告)号：US20180337035A1

公开(公告)日：2018-11-22

申请号：US16049329

申请日：2018-07-30

Applicant: Micron Technology, Inc.

Inventor： Nicholas Hendricks ,  Adam L. Olson ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Kaveri Jain ,  Scott Schuldenfrei

IPC: H01L21/027 ,  H01L21/3105 ,  H01L21/033 ,  H01L21/02 ,  B81C1/00 ,  C08L53/00 ,  C08G81/00

CPC classification number: H01L21/0273 ,  B81C1/00031 ,  B81C2201/0149 ,  C08G81/00 ,  C08L53/005 ,  H01L21/02118 ,  H01L21/02175 ,  H01L21/02318 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31058

Abstract: A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.

公开(公告)号：US10049874B2

公开(公告)日：2018-08-14

申请号：US14920018

申请日：2015-10-22

Applicant: Micron Technology, Inc.

Inventor： Nicholas Hendricks ,  Adam L. Olson ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Kaveri Jain ,  Scott Schuldenfrei

IPC: H01L29/06 ,  H01L21/027 ,  C08G81/00 ,  H01L21/033 ,  H01L21/3105 ,  B81C1/00 ,  C08L53/00 ,  H01L21/02

Abstract: A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.

公开(公告)号：US09911693B2

公开(公告)日：2018-03-06

申请号：US14838768

申请日：2015-08-28

Applicant: Micron Technology, Inc.

Inventor： William R. Brown ,  Jenna L. Russon ,  Tim H. Bossart ,  Brian R. Watson ,  Nikolay A. Mirin ,  David A. Kewley

IPC: H01L23/528 ,  H01L27/108 ,  H01L21/768 ,  H01L27/11582

CPC classification number: H01L23/528 ,  H01L21/0337 ,  H01L21/32139 ,  H01L21/76838 ,  H01L21/76895 ,  H01L23/5283 ,  H01L27/10882 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/11582 ,  H01L28/00

Abstract: A semiconductor device including conductive lines is disclosed. First conductive lines each comprise a first portion, a second portion, and an enlarged portion, the enlarged portion connecting the first portion and the second portion of the first conductive line. The semiconductor device includes second conductive lines, at least some of the second conductive lines disposed between a pair of the first conductive lines, each second conductive line including a larger cross-sectional area at an end portion of the second conductive line than at other portions thereof. The semiconductor device includes a pad on each of the first conductive lines and the second conductive lines, wherein the pad on each of the second conductive lines is on the end portion thereof and the pad on the each of the first conductive lines is on the enlarged portion thereof.

公开(公告)号：US09741580B2

公开(公告)日：2017-08-22

申请号：US14674476

申请日：2015-03-31

Applicant: Micron Technology, Inc.

Inventor： Vishal Sipani ,  Anton J. deVilliers ,  William R. Brown ,  Shane J. Trapp ,  Ranjan Khurana ,  Kevin R. Shea

IPC: H01L29/76 ,  H01L21/308 ,  H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L21/22 ,  H01L21/266 ,  H01L21/32 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L21/308 ,  H01L21/02642 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/22 ,  H01L21/266 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/76816

Abstract: A method of forming a pattern on a substrate comprises forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Sidewall lining is formed over inner and over outer sidewalls of the cylinder-like structures, and that forms interstitial spaces laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall linings that are over outer sidewalls of four of the cylinder-like structures. Other embodiments are disclosed, including structure independent of method.

公开(公告)号：US09142504B2

公开(公告)日：2015-09-22

申请号：US14457658

申请日：2014-08-12

Applicant: Micron Technology, Inc.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

IPC: H01L29/06 ,  H01L23/52 ,  H01L21/467 ,  H01L21/768 ,  H01L21/027

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.

Abstract translation: 公开了形成特征的方法。 一种方法包括在衬底结构上的酸性或碱性材料池上形成抗蚀剂，选择性地将抗蚀剂暴露于能量源以形成暴露的抗蚀剂部分和未曝光的抗蚀剂部分，以及将酸性或碱性材料的酸或碱扩散 从池中到抗蚀剂的近端部分。 另一种方法包括在衬底结构中形成多个凹陷。 多个凹部填充有包含酸或碱的池材料。 在池材料上形成抗蚀剂，并且衬底结构和酸或碱扩散到抗蚀剂的相邻部分。 抗蚀剂被图案化以在抗蚀剂中形成开口。 开口包括远离衬底结构的较宽部分和靠近衬底结构的较窄部分。 公开了包括这些特征的附加方法和半导体器件结构。

公开(公告)号：US20150206760A1

公开(公告)日：2015-07-23

申请号：US14674476

申请日：2015-03-31

Applicant: Micron Technology, Inc.

Inventor： Vishal Sipani ,  Anton J. deVilliers ,  William R. Brown ,  Shane J. Trapp ,  Ranjan Khurana ,  Kevin R. Shea

IPC: H01L21/308 ,  H01L21/02

CPC classification number: H01L21/308 ,  H01L21/02642 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/22 ,  H01L21/266 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/76816

Abstract: A method of forming a pattern on a substrate comprises forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Sidewall lining is formed over inner and over outer sidewalls of the cylinder-like structures, and that forms interstitial spaces laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by longitudinally-contacting sidewall linings that are over outer sidewalls of four of the cylinder-like structures. Other embodiments are disclosed, including structure independent of method.

Abstract translation: 在衬底上形成图案的方法包括形成间隔开的向上开口的圆柱状结构，其纵向向外突出。 侧壁衬里形成在圆柱状结构的内侧和上侧外侧上，并且在圆柱状结构的横向外侧形成间隙空间。 间隙空间被四个圆柱状结构的外侧壁上的纵向接触的侧壁衬里分开包围。 公开了其他实施例，包括与方法无关的结构。

公开(公告)号：US20140154886A1

公开(公告)日：2014-06-05

申请号：US14171848

申请日：2014-02-04

Applicant: Micron Technology, Inc.

Inventor： William R. Brown ,  David Kewley ,  Adam Olson

IPC: H01L21/308

CPC classification number: H01L21/308 ,  G03F9/708 ,  G03F9/7084 ,  H01L21/0337 ,  H01L21/3086

Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features. Individual of the photoresist blocks have an opposing pair of second pattern edges in the cross-section that self-align laterally outward of the first pattern edges to the laterally innermost sidewalls of the features during the patterning.

Abstract translation: 在形成划线对准标记中处理半导体衬底的方法包括在半导体衬底的划线区域内形成间距倍数非电路特征。 在横截面中，特征的个体具有小于在光刻图案化基底中使用的最小光刻特征尺寸的最大宽度。 光刻胶沉积在特征上。 将其图案化以形成在横截面中单独地接收在相应的一对特征之间的光致抗蚀剂块。 各对的特征的个体在横截面中具有横向最内侧的侧壁。 光致抗蚀剂块的个体在横截面中具有相对的一对第一图案边缘，其横向相对于相应的一对特征的横向最内侧的侧壁向内间隔开。 光致抗蚀剂块的个体在横截面中具有相对的一对第二图案边缘，其在图案化期间自动对准第一图案边缘的横向外侧到特征的侧向最内侧。

公开(公告)号：US20140145311A1

公开(公告)日：2014-05-29

申请号：US13687419

申请日：2012-11-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

IPC: H01L21/467 ,  H01L23/00 ,  H01L21/441

CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.

Abstract translation: 公开了形成特征的方法。 一种方法包括在衬底结构上的酸性或碱性材料池上形成抗蚀剂，选择性地将抗蚀剂暴露于能量源以形成暴露的抗蚀剂部分和未曝光的抗蚀剂部分，以及将酸性或碱性材料的酸或碱扩散 从池中到抗蚀剂的近端部分。 另一种方法包括在衬底结构中形成多个凹陷。 多个凹部填充有包含酸或碱的池材料。 在池材料上形成抗蚀剂，并且衬底结构和酸或碱扩散到抗蚀剂的相邻部分。 抗蚀剂被图案化以在抗蚀剂中形成开口。 开口包括远离衬底结构的较宽部分和靠近衬底结构的较窄部分。 公开了包括这些特征的附加方法和半导体器件结构。

公开(公告)号：US20190103350A1

公开(公告)日：2019-04-04

申请号：US16200902

申请日：2018-11-27

Applicant: Micron Technology, Inc.

Inventor： William R. Brown ,  Jenna L. Russon ,  Tim H. Bossart ,  Brian R. Watson ,  Nikolay A. Mirin ,  David A. Kewley

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/033 ,  H01L49/02 ,  H01L27/11582 ,  H01L27/108

Abstract: A semiconductor device including conductive lines is disclosed. First conductive lines each comprise a first portion, a second portion, and an enlarged portion, the enlarged portion connecting the first portion and the second portion of the first conductive line. The semiconductor device includes second conductive lines, at least some of the second conductive lines disposed between a pair of the first conductive lines, each second conductive line including a larger cross-sectional area at an end portion of the second conductive line than at other portions thereof. The semiconductor device includes a pad on each of the first conductive lines and the second conductive lines, wherein the pad on each of the second conductive lines is on the end portion thereof and the pad on each of the first conductive lines is on the enlarged portion thereof.