METHODS OF OPERATING A MEMORY DURING A PROGRAMMING OPERATION

    公开(公告)号:US20170365344A1

    公开(公告)日:2017-12-21

    申请号:US15692073

    申请日:2017-08-31

    CPC classification number: G11C16/10 G11C16/0483 G11C16/32

    Abstract: Methods of operating a memory include increasing a voltage applied to a first access line from a first voltage to a second voltage higher than the first voltage while applying the first voltage to a second access line, the first access line coupled to a target memory cell of the programming operation and an unselected memory cell not targeted for the programming operation, and the second access line coupled to memory cells not targeted for the programming operation. After increasing the voltage applied to the first access line, increasing the voltage applied to the first access line from the second voltage to a third voltage higher than the second voltage and increasing a voltage applied to the second access line from the first voltage to a fourth voltage higher than the first voltage and lower than the third voltage.

    Program inhibiting in memory devices

    公开(公告)号:US09666282B1

    公开(公告)日:2017-05-30

    申请号:US15145204

    申请日:2016-05-03

    CPC classification number: G11C16/10 G11C16/0483 G11C16/32

    Abstract: In an example, a method may include increasing a voltage applied to an unprogrammed first memory cell in a string of series-connected memory cells from a first voltage to a second voltage while a voltage applied to second memory cells in the string of series-connected memory cells is at the first voltage and increasing the voltage applied to the second memory cells from the first voltage to a pass voltage concurrently with increasing the voltage applied to the unprogrammed first memory cell from the second voltage to a program voltage.

    Level Shifters, Memory Systems, and Level Shifting Methods
    16.
    发明申请
    Level Shifters, Memory Systems, and Level Shifting Methods 有权
    水平移位器,记忆系统和液位移动方法

    公开(公告)号:US20150194961A1

    公开(公告)日:2015-07-09

    申请号:US14150228

    申请日:2014-01-08

    Inventor: Yogesh Luthra

    Abstract: Level shifters, memory systems, and level shifting methods are described. According to one arrangement, a level shifter includes an input configured to receive an input signal in a first voltage domain, an output configured to output an output signal from the level shifter in a second voltage domain different than the first voltage domain, a plurality of pull-down devices, and wherein one of the pull-down devices is coupled with the input and the output, a plurality of cross-coupled devices coupled with the pull-down devices and configured to provide transitions in the output signal as a result of transitions in the input signal, a plurality of current limiting devices coupled with the cross-coupled devices and configured to limit a flow of current from a source to the cross-coupled devices, and a plurality of dynamic devices configured to selectively provide charging current from the source to the cross-coupled devices.

    Abstract translation: 描述了电平移位器,存储器系统和电平转换方法。 根据一种布置,电平移位器包括被配置为在第一电压域中接收输入信号的输入,被配置为在不同于第一电压域的第二电压域中输出来自电平移位器的输出信号的输出,多个 下拉装置,并且其中下拉装置中的一个与输入和输出端耦合;多个交叉耦合装置,与下拉装置耦合,并且被配置为提供输出信号中的转换,作为 输入信号中的转换,与交叉耦合器件耦合并被配置为限制电流从源极耦合到交叉耦合器件的多个限流器件,以及多个动态器件,被配置为选择性地提供从 源到交叉耦合器件。

    Techniques for providing a direct injection semiconductor memory device
    17.
    发明授权
    Techniques for providing a direct injection semiconductor memory device 有权
    提供直接注入半导体存储器件的技术

    公开(公告)号:US08964461B2

    公开(公告)日:2015-02-24

    申请号:US14084386

    申请日:2013-11-19

    Inventor: Yogesh Luthra

    Abstract: Techniques for providing a direct injection semiconductor memory device are disclosed. In one embodiment, the techniques may be realized as a method for biasing a direct injection semiconductor memory device including the steps of applying a first non-negative voltage potential to a first region via a bit line and applying a second non-negative voltage potential to a second region via a source line. The method may also include applying a third voltage potential to a word line, wherein the word line may be spaced apart from and capacitively to a body region that may be electrically floating and disposed between the first region and the second region. The method may further include applying a fourth positive voltage potential to a third region via a carrier injection line, wherein the third region may be disposed below at least one of the first region, the body region, and the second region.

    Abstract translation: 公开了提供直接注入半导体存储器件的技术。 在一个实施例中,技术可以被实现为用于偏置直接注入半导体存储器件的方法,包括以下步骤:通过位线将第一非负电压电位施加到第一区域,并将第二非负电压电位施加到 经由源极线的第二区域。 该方法还可以包括将第三电压电位施加到字线,其中字线可以与可以电浮动并且布置在第一区域和第二区域之间的体区间隔开并且电容化。 该方法可以进一步包括经由载体注入管线将第四正电压电位施加到第三区域,其中第三区域可以设置在第一区域,体区域和第二区域中的至少一个之下。

    Memory systems and memory programming methods

    公开(公告)号:US10937493B2

    公开(公告)日:2021-03-02

    申请号:US16174044

    申请日:2018-10-29

    Abstract: Memory systems and memory programming methods are described. According to one aspect, a memory system includes program circuitry configured to provide a program signal to a memory cell to program the memory cell from a first memory state to a second memory state, detection circuitry configured to detect the memory cell changing from the first memory state to the second memory state during the provision of the program signal to the memory cell to program the memory cell, and wherein the program circuitry is configured to alter the program signal as a result of the detection and to provide the altered program signal to the memory cell to continue to program the memory cell from the first memory state to the second memory state.

    Memory devices and methods of their operation during a programming operation

    公开(公告)号:US09805801B1

    公开(公告)日:2017-10-31

    申请号:US15499119

    申请日:2017-04-27

    CPC classification number: G11C16/10 G11C16/0483 G11C16/32

    Abstract: Methods of operating a memory device during a programming operation, and memory devices so configured, including increasing a voltage applied to a selected access line from a first voltage while maintaining a voltage applied to an unselected access line at the first voltage. The selected access line is connected to a control gate of a target memory cell of a string of series-connected memory cells that is targeted for programming during the programming operation and the unselected access line is connected to a control gate of a second memory cell of the string of series-connected memory cells that is untargeted for programming during the programming operation. After the voltage applied to the selected access line reaches a second voltage, the methods further include increasing the voltage applied to the unselected access line from the first voltage while increasing the voltage applied to the selected access line from the second voltage.

    Memory devices, memory device operational methods, and memory device implementation methods
    20.
    发明授权
    Memory devices, memory device operational methods, and memory device implementation methods 有权
    存储器件,存储器件操作方法和存储器件实现方法

    公开(公告)号:US09576618B2

    公开(公告)日:2017-02-21

    申请号:US14987637

    申请日:2016-01-04

    Abstract: Memory devices, memory device operational methods, and memory device implementation methods are described. According to one arrangement, a memory device includes memory circuitry configured to store data in a plurality of different data states, temperature sensor circuitry configured to sense a temperature of the memory device and to generate an initial temperature output which is indicative of the temperature of the memory device, and conversion circuitry coupled with the temperature sensor circuitry and configured to convert the initial temperature output into a converted temperature output which is indicative of the temperature of the memory device at a selected one of a plurality of possible different temperature resolutions, and wherein the converted temperature output is utilized by the memory circuitry to implement at least one operation with respect to storage of the data.

    Abstract translation: 描述了存储器件,存储器件操作方法和存储器件实现方法。 根据一种布置,存储器件包括被配置为存储多个不同数据状态的数据的存储器电路,温度传感器电路被配置为感测存储器件的温度并产生初始温度输出,其表示温度 存储器件和转换电路,其与温度传感器电路耦合并且被配置为将初始温度输出转换成转换后的温度输出,该转换温度输出指示存储器件在多个可能的不同温度分辨率中选定的一个温度, 转换的温度输出由存储器电路用于实现关于数据存储的至少一个操作。

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