Dual depth junction structures and process methods

    公开(公告)号:US12284839B2

    公开(公告)日:2025-04-22

    申请号:US17700858

    申请日:2022-03-22

    Inventor: Hui Zang Gang Chen

    Abstract: Transistors, electronic devices, and methods are provided. Transistors include a gate trench formed in a semiconductor substrate and extending to a gate trench depth, and a source and a drain formed as doped regions in the semiconductor substrate and having a first conductive type. The source and the drain are formed along a channel length direction of the transistor at a first end and a second end of the gate trench, respectively, and the source and the drain each includes a first doped region and a second doped region extending away from the first doped region. The second doped region extends to a depth in the semiconductor substrate deeper than the first doped region relative to a surface of the semiconductor substrate.

    Uneven-trench pixel cell and fabrication method

    公开(公告)号:US11948965B2

    公开(公告)日:2024-04-02

    申请号:US17220695

    申请日:2021-04-01

    Inventor: Hui Zang Gang Chen

    Abstract: An uneven-trench pixel cell includes a semiconductor substrate that includes a floating diffusion region, a photodiode region, and, between a front surface and a back surface: a first sidewall surface, a shallow bottom surface, a second sidewall surface, and a deep bottom surface. The first sidewall surface and a shallow bottom surface define a shallow trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A shallow depth of the shallow trench exceeds a junction depth of the floating diffusion region. The second sidewall surface and a deep bottom surface define a deep trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A distance between the deep bottom surface and the front surface defines a deep depth, of the deep trench, that exceeds the shallow depth.

    Pixel-array substrate and associated method

    公开(公告)号:US11784206B2

    公开(公告)日:2023-10-10

    申请号:US17080780

    申请日:2020-10-26

    Inventor: Hui Zang Gang Chen

    Abstract: A pixel-array substrate includes a floating diffusion region and a first photodiode formed in a semiconductor substrate. A top surface of the semiconductor substrate defines a trench 1A and a trench 1B each (i) extending into the semiconductor substrate away from a planar region of the top surface between the trench 1A and the trench 1B and (ii) having a respective distal end, with respect to the floating diffusion region, located between the floating diffusion region and the first photodiode. In a horizontal plane parallel to the top surface and along an inter-trench direction between the trench 1A and the trench 1B, a first spatial separation between the trench 1A and the trench 1B increases with increasing distance from the floating diffusion region.

    CENTRAL DEEP TRENCH ISOLATION SHIFT
    14.
    发明公开

    公开(公告)号:US20230268357A1

    公开(公告)日:2023-08-24

    申请号:US17680045

    申请日:2022-02-24

    Inventor: Hui Zang Chao Niu

    Abstract: Image sensors include a pixel array arranged about an array center, each pixel of the pixel array having a photodiode formed in a semiconductor substrate, and a central deep trench isolation structure disposed in the semiconductor substrate relative to a pixel center between the photodiode and an illuminated surface of the semiconductor substrate. If the pixel center is not coincident with the array center, then the central deep trench isolation structure is disposed at a CDTI shift distance away from the pixel center.

    Method and image sensor with vertical transfer gate and buried backside-illuminated photodiodes

    公开(公告)号:US11574947B2

    公开(公告)日:2023-02-07

    申请号:US16996804

    申请日:2020-08-18

    Inventor: Hui Zang Gang Chen

    Abstract: A photodiode array has buried photodiodes and vertical selection transistors. Trenches are lined with gate oxide and metallic plugs of first material lie within the trenches. Gate contacts of second material contact the metallic plugs, with photodiode diffusion regions adjacent the trenches as sources of vertical transistors, the metallic plugs form gates of the vertical transistors, and buried photodiode regions form sources of the vertical transistors. In embodiments, the first conductive material is tungsten, titanium nitride, titanium carbide, or aluminum and the second conductive material is polysilicon. The array is formed by trenching, growing gate oxide, and depositing first material in the trenches. The first material is etched to define metallic plugs, the second material is deposited onto the metallic plugs then masked and etched; and drain regions implanted. Etching the second material is performed by a reactive ion etch that stops upon reaching the metallic plugs.

    Trench formation methods
    17.
    发明授权

    公开(公告)号:US11522005B1

    公开(公告)日:2022-12-06

    申请号:US17405605

    申请日:2021-08-18

    Inventor: Hui Zang

    Abstract: Methods of forming trench structures of different depths in a semiconductor substrate are provided. A first mask forming a first opening and a second opening is provided on the semiconductor substrate. The semiconductor substrate is etched through the first and second openings, thereby forming a first trench and a second trench. Trench structure material is deposited in the first and second trenches, thereby forming first and second trench structures. A second mask is provided on the first mask, wherein the second mask covers the first opening and has a third opening superimposed over the second opening of the first mask. The second trench structure is etched through the second opening of the first mask and through the third opening of the second mask.

    PIXEL LAYOUT WITH PHOTODIODE REGION PARTIALLY SURROUNDING CIRCUITRY

    公开(公告)号:US20220352220A1

    公开(公告)日:2022-11-03

    申请号:US17243024

    申请日:2021-04-28

    Abstract: An image sensor comprises a first photodiode region and circuitry. The first photodiode region is disposed within a semiconductor substrate proximate to a first side of the semiconductor substrate to form a first pixel. The first photodiode region includes a first segment coupled to a second segment. The circuitry includes at least a first electrode associated with a first transistor. The first electrode is disposed, at least in part, between the first segment and the second segment of the first photodiode region such that the circuity is at least partially surrounded by the first photodiode region when viewed from the first side of the semiconductor substrate.

    Light attenuation layer fabrication method and structure for image sensor

    公开(公告)号:US11362121B2

    公开(公告)日:2022-06-14

    申请号:US16775022

    申请日:2020-01-28

    Abstract: An image sensor includes a substrate having a plurality of small photodiodes and a plurality of large photodiodes surrounding the small photodiodes. The substrate further includes a plurality of deep trench isolation structures in regions of the substrate between ones of the small photodiodes and the large photodiodes. Each of large photodiodes having a full well capacity larger than each of the small photodiodes. The image sensor further includes an array of color filters disposed over the substrate, a first and second buffer layer disposed between the substrate and the array of color filters, metal grid structures disposed between the color filters and above the first buffer layer, and an attenuation layer portion above a region of the substrate between ones of the large and small photodiodes, the attenuation layer portion is between the first and second buffer layers and normal to an upper surface of the substrate.

    Vertical gate structure and layout in a CMOS image sensor

    公开(公告)号:US11355537B2

    公开(公告)日:2022-06-07

    申请号:US16655017

    申请日:2019-10-16

    Inventor: Hui Zang Gang Chen

    Abstract: A pixel cell includes a photodiode buried beneath a first side of semiconductor material and coupled to photogenerate image charge in response to incident light. A transfer gate is disposed over the photodiode and includes a vertical transfer gate portion extending a first distance from the first side into the semiconductor material. A floating diffusion region is disposed in the semiconductor material proximate to the transfer gate and is coupled to transfer the image charge from the photodiode toward the first side of the semiconductor material and into the floating diffusion region in response to a transfer control signal. A first pixel transistor having a first gate is disposed over the photodiode proximate to the first side of the semiconductor material. The first gate has a ring structure laterally surrounding the floating diffusion region and the transfer gate at the first side of the semiconductor material.

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