Abstract:
An image sensor pixel includes a photosensitive element, a floating diffusion region, a transfer gate, a dielectric charge trapping region, and a first metal contact. The photosensitive element is disposed in a semiconductor layer to receive electromagnetic radiation along a vertical axis. The floating diffusion region is disposed in the semiconductor layer, while the transfer gate is disposed on the semiconductor layer to control a flow of charge produced in the photosensitive element to the floating diffusion region. The dielectric charge trapping device is disposed on the semiconductor layer to receive electromagnetic radiation along the vertical axis and to trap charges in response thereto. The dielectric charge trapping device is further configured to induce charge in the photosensitive element in response to the trapped charges. The first metal contact is coupled to the dielectric charge trapping device to provide a first bias voltage to the dielectric charge trapping device.
Abstract:
Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.
Abstract:
A pixel-array substrate includes a semiconductor substrate with a pixel array, a back surface, and a front surface, and a guard ring formed of a doped semiconductor, enclosing the pixel array, and extending into the semiconductor substrate from the front surface, the back surface forming a trench extending into the semiconductor substrate, the trench overlapping the guard ring. A method for reducing leakage current into a pixel-array includes doping a semiconductor substrate to form a guard ring that extends into the semiconductor substrate from a front surface, encloses a pixel array, excludes a periphery region, and resists a flow of electric current, and forming, into a back surface of the semiconductor substrate, a trench that penetrates into the back surface and overlaps the guard ring, the guard ring and the trench configured to resist the flow of electric current between the pixel array and the periphery region.
Abstract:
An image sensor includes a photodiode disposed in a semiconductor substrate having a first surface and a second surface opposite to the first surface. A floating diffusion is disposed in the semiconductor substrate. A transfer transistor is configured for coupling the photodiode to the floating diffusion. The transfer transistor includes a vertical transfer gate extending a first depth in a depthwise direction from the first surface into the semiconductor substrate. A transistor is coupled to the floating diffusion. The transistor includes: a planar gate disposed proximate to the first surface of the semiconductor substrate; and a plurality of vertical gate electrodes, each extending a respective depth into the semiconductor substrate from the planar gate in the depthwise direction. The respective depth of at least one of the plurality of vertical gate electrodes is the same as the first depth of the vertical transfer gate.
Abstract:
Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. At least three substrate trench structures are formed in the semiconductor substrate, defining two nonplanar structures, each having a plurality of sidewall portions. An isolation layer includes at least three isolation layer trench structures, each being disposed in a respective one of the three substrate trench structures. A gate includes three fingers, each being disposed in a respective one of the three isolation layer trench structures. An electron channel of the transistor extends along the plurality of sidewall portions of the two nonplanar structures in a channel width plane.
Abstract:
A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.
Abstract:
A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.
Abstract:
A pixel cell for use in a high dynamic range image sensor includes a photodiode disposed in semiconductor material to accumulate charge in response to light incident upon the photodiode. A transfer transistor is disposed in the semiconductor material and is coupled between a floating diffusion and the photodiode. A first amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal of the pixel cell. A second amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal of the pixel cell.
Abstract:
A pixel cell for use in a high dynamic range image sensor includes a photodiode disposed in semiconductor material to accumulate charge in response to light incident upon the photodiode. A transfer transistor is disposed in the semiconductor material and is coupled between a floating diffusion and the photodiode. A first amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal of the pixel cell. A second amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal of the pixel cell.
Abstract:
A pixel cell is formed on a semiconductor substrate having a front surface. The pixel cell includes a photodiode, a floating diffusion region, and a transfer gate. The photodiode is disposed in the semiconductor substrate. The floating diffusion region includes a first doped region disposed in the semiconductor substrate, wherein the first doped region extends from the front surface to a first junction depth in the semiconductor substrate. The transfer gate is configured to selectively couple the photodiode to the floating diffusion region controlling charge transfer between the photodiode and the floating diffusion region. The transfer gate includes a planar gate disposed on the front surface of the semiconductor substrate and a pair of vertical gate electrodes. Each vertical gate electrode extending a gate depth from the planar gate into the semiconductor substrate. The first junction depth is greater than the gate depth.