公开(公告)号：US06884120B1

公开(公告)日：2005-04-26

申请号：US10608255

申请日：2003-06-27

Applicant: Belgacem Haba ,  Para Segaram ,  Joseph C. Fjelstad

Inventor： Belgacem Haba ,  Para Segaram ,  Joseph C. Fjelstad

IPC: H01R24/00

CPC classification number: H01R12/88 ,  H01R12/79 ,  H01R13/2407

Abstract: A connector is described which uses a coupling structure integrally formed from a plurality of discrete elements that are aligned to receive an insertion force. In response to the insertion force affecting some or all of the elements, the affected elements move from an original state into a deflected state. In the deflected state, the overall thickness of the coupling structure is reduced. The relationship between the coupling structure and a dimension of a cavity that is to be occupied by the coupling structure is such that when the thickness of the coupling structure is reduced, the dimension of the cavity is increased.

Abstract translation: 描述了一种连接器，其使用由对准以接收插入力的多个分立元件整体形成的联接结构。 响应于影响部分或全部元件的插入力，受影响的元件从原始状态移动到偏转状态。 在偏转状态下，耦合结构的总体厚度减小。 耦合结构与要由耦合结构占据的空腔的尺寸之间的关系使得当耦合结构的厚度减小时，空腔的尺寸增加。

公开(公告)号：US4954785A

公开(公告)日：1990-09-04

申请号：US337082

申请日：1989-04-12

Applicant: Para Segaram

Inventor： Para Segaram

IPC: H03H19/00 ,  H03J7/02

CPC classification number: H03J7/02 ,  H03H19/004

Abstract: A tunable filter (66) having a filter characteristic tracking an input signal in accordance with the invention includes a signal source (18) providing a variable frequency signal to be tracked by the filter characteristic; a frequency detector (62) coupled to the signal source for producing a detector output signal which is a function of the frequency of the variable frequency signal; a switching signal generator (64), responsive to the frequency detector output signal, for generating at least one switching signal having a variable frequency proportional to the detector output signal; a first capacitor (112, 126, 150, 152, 156 and 158) having a first terminal coupled to a reference potential and a second terminal; and a first switching circuit (114, 128, 154 and 160) having an input coupled to the variable frequency signal, responsive to the at least one switching signal, and in response to changes in level of the at least one switching signal alternately connecting the input of the first switching circuit to the second terminal of the first capacitor and the second terminal of the first capacitor to the output of the first switching circuit coupled to an output of the filter.

Abstract translation: 根据本发明的具有跟踪输入信号的滤波器特性的可调滤波器（66）包括提供由滤波器特性跟踪的可变频率信号的信号源（18）; 耦合到所述信号源的频率检测器（62），用于产生作为所述可变频率信号的频率的函数的检测器输出信号; 响应于所述频率检测器输出信号的开关信号发生器（64），用于产生具有与所述检测器输出信号成比例的可变频率的至少一个开关信号; 具有耦合到参考电位的第一端子和第二端子的第一电容器（112,126,150,152,156和158）; 以及第一开关电路（114,128,154和160），其具有耦合到所述可变频率信号的输入，响应于所述至少一个开关信号，以及响应于所述至少一个开关信号的电平的变化， 将第一开关电路的输入端与第一电容器的第二端子和第一电容器的第二端子输入到耦合到滤波器的输出端的第一开关电路的输出端。

公开(公告)号：US07014472B2

公开(公告)日：2006-03-21

申请号：US10756924

申请日：2004-01-13

Applicant: Joseph C. Fjelstad ,  Para Segaram ,  Thomas Obenhuber ,  Gary Yasumura

Inventor： Joseph C. Fjelstad ,  Para Segaram ,  Thomas Obenhuber ,  Gary Yasumura

IPC: H01R12/00 ,  H05K1/00

CPC classification number: H05K7/1431 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01R12/716 ,  H01R12/721 ,  H05K1/14 ,  H05K1/147 ,  H05K1/148 ,  H05K3/222 ,  H05K2201/044 ,  H05K2201/1053 ,  H05K2201/10734

Abstract: A device module may be used to carry a plurality of devices, such as memory devices or other components. The device module may include a board, a first set of contact points, and a second set of contact points. A plurality of signal paths may be provided on the board, where each signal path extends between a contact point in the first set and a contact point in the second set. Each of the plurality of signal paths has substantially an identical length and a same number of turns on the board.

Abstract translation: 设备模块可以用于承载诸如存储设备或其他组件的多个设备。 设备模块可以包括板，第一组接触点和第二组接触点。 多个信号路径可以设置在板上，其中每个信号路径在第一组中的接触点和第二组中的接触点之间延伸。 多个信号路径中的每一个在板上具有基本上相同的长度和相同的匝数。

公开(公告)号：US20060034061A1

公开(公告)日：2006-02-16

申请号：US11097450

申请日：2005-04-01

Applicant: Kevin Grundy ,  Gary Yasumura ,  Joseph Fjelstad ,  William Wiedemann ,  Para Segaram

Inventor： Kevin Grundy ,  Gary Yasumura ,  Joseph Fjelstad ,  William Wiedemann ,  Para Segaram

IPC: H01R12/16

CPC classification number: H01R12/52 ,  H01R12/7011 ,  H01R12/7082 ,  H01R12/714 ,  H01R12/716 ,  H01R12/721 ,  H01R13/24 ,  H01R31/06 ,  H05K1/0237 ,  H05K1/14 ,  H05K1/147 ,  H05K3/222 ,  H05K7/1441 ,  H05K2201/044 ,  H05K2201/10189 ,  H05K2201/10356

Abstract: A signal-segregating connector for use in a system having a printed circuit board, a first electrical structure and a second electrical structure. The connector includes a first set of conductive elements to convey signals between the first electrical structure and the printed circuit board, and a second set of conductive elements to convey signals between the first electrical structure and the second electrical structure.

公开(公告)号：US20050093127A1

公开(公告)日：2005-05-05

申请号：US10947686

申请日：2004-09-23

Applicant: Joseph Fjelstad ,  Para Segaram ,  Thomas Obenhuber ,  Inessa Obenhuber ,  Kevin Grundy

Inventor： Joseph Fjelstad ,  Para Segaram ,  Thomas Obenhuber ,  Inessa Obenhuber ,  Kevin Grundy

IPC: H01L20060101 ,  H01L21/56 ,  H01L23/31 ,  H01L23/48 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L24/85 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49537 ,  H01L23/49805 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2224/32245

Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.

Abstract translation: 具有多个表面的IC封装，用于与互连元件互连，从IC芯片连接到位于其多于一个表面上的封装组件的I / O端子，并且与空间上分离的其它器件或组件互连。

公开(公告)号：US20050014395A1

公开(公告)日：2005-01-20

申请号：US10756924

申请日：2004-01-13

Applicant: Joseph Fjelstad ,  Para Segaram ,  Thomas Obenhuber ,  Gary Yasumura

Inventor： Joseph Fjelstad ,  Para Segaram ,  Thomas Obenhuber ,  Gary Yasumura

IPC: H01R12/16 ,  H01R12/18 ,  H05K1/14 ,  H05K3/22 ,  H05K7/14 ,  H01R12/00

CPC classification number: H05K7/1431 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01R12/716 ,  H01R12/721 ,  H05K1/14 ,  H05K1/147 ,  H05K1/148 ,  H05K3/222 ,  H05K2201/044 ,  H05K2201/1053 ,  H05K2201/10734

Abstract: A device module may be used to carry a plurality of devices, such as memory devices or other components. The device module may include a board, a first set of contact points, and a second set of contact points. A plurality of signal paths may be provided on the board, where each signal path extends between a contact point in the first set and a contact point in the second set. Each of the plurality of signal paths has substantially an identical length and a same number of turns on the board.

Abstract translation: 设备模块可以用于承载诸如存储设备或其他组件的多个设备。 设备模块可以包括板，第一组接触点和第二组接触点。 多个信号路径可以设置在板上，其中每个信号路径在第一组中的接触点和第二组中的接触点之间延伸。 多个信号路径中的每一个在板上具有基本上相同的长度和相同的匝数。