Enhanced integrated waveshaping circuit
    7.
    发明授权
    Enhanced integrated waveshaping circuit 失效
    增强型集成波形电路

    公开(公告)号:US5410188A

    公开(公告)日:1995-04-25

    申请号:US133405

    申请日:1993-10-07

    Applicant: Para Segaram

    Inventor: Para Segaram

    Abstract: The waveshaping functions provided by a summing resistor network and filter are performed by a waveshaping circuit that can be integrated with transceiving functions within a single integrated circuit. The waveshaping circuit utilizes the edges of an oscillator signal to generate a series of pairs of logic signals which have a defined timing relationship with respect to an input data signal. Each pair of logic signals is then utilized by a corresponding number of current stages to provide both an incremental portion of an output waveform and an incremental portion of a complementary output waveform. The pair of output waveforms can then be produced by summing together all of the incremental portions of the pair of waveforms.

    Abstract translation: 由一个求和电阻网络和滤波器提供的波形整形功能是通过一个波形整形电路进行的,该电路可以与单个集成电路中的收发功能相集成。 波形整形电路利用振荡器信号的边缘产生一系列相对于输入数据信号具有定义的时序关系的逻辑信号对。 然后,每对逻辑信号被相应数目的当前级用来提供输出波形的增量部分和互补输出波形的增量部分。 然后可以通过将所述一对波形的所有增量部分相加来产生一对输出波形。

    High Speed Communication System With A Feedback Synchronization Loop
    8.
    发明申请
    High Speed Communication System With A Feedback Synchronization Loop 有权
    具有反馈同步环路的高速通信系统

    公开(公告)号:US20060165186A1

    公开(公告)日:2006-07-27

    申请号:US11279350

    申请日:2006-04-11

    Applicant: Para Segaram

    Inventor: Para Segaram

    Abstract: In a communications device having a physical layer device and a processing device connected to the physical layer device, the number of input/output (I/O) ports required for communication between the devices in the gigabit range is substantially reduced by utilizing millivolt differential I/O drivers and receivers. In addition, a calibration feedback loop synchronizes the data and clock signals on the processing device, thereby eliminating the need to recover the clock on the processing device.

    Abstract translation: 在具有连接到物理层设备的物理层设备和处理设备的通信设备中,在千兆比特范围内的设备之间进行通信所需的输入/输出(I / O)端口的数量通过利用毫伏差分I / O驱动程序和接收器。 此外,校准反馈环路在处理设备上同步数据和时钟信号,从而消除了在处理设备上恢复时钟的需要。

Patent Agency Ranking