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11.发明授权公开(公告)号：US10797720B2
公开(公告)日：2020-10-06
申请号：US16367712
申请日：2019-03-28
Applicant: QUALCOMM Incorporated
Inventor： Eunyung Sung , Nitz Saputra , Behnam Sedighi , Ashok Swaminathan , Honghao Ji , Shahin Mehdizad Taleie , Dongwon Seo
Abstract: A current digital-to-analog converter includes a binary current-generating section configured to generate a binary-weighted current based on a first set of control signals; a unary current-generating section configured to generate a unary-weighted current based on a second set of control signals; and a current combining circuit configured to add or subtract a reference current and a current generated by a current source of the unary current-generating section using the binary-weighted current.
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公开(公告)号：US10686476B1
公开(公告)日：2020-06-16
申请号：US16417455
申请日：2019-05-20
Applicant: QUALCOMM Incorporated
Inventor： Shahin Mehdizad Taleie , Nitz Saputra , Chen Jiang , Behnam Sedighi , Ibrahim Ramez Chamas , Bhushan Shanti Asuri , Dongwon Seo
Abstract: An RF-DAC transmitter is provided that includes an in-phase channel, a quadrature-phase channel, a first intermediate-phase channel, and a second intermediate-phase channel. Each channel includes a pair of interleaved RF-DACs for producing a pair of interleaved RF signals and a subtractor.
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公开(公告)号：US10666285B1
公开(公告)日：2020-05-26
申请号：US16202723
申请日：2018-11-28
Applicant: QUALCOMM Incorporated
Inventor： Shahin Mehdizad Taleie , Behnam Sedighi , Dongwon Seo , Parisa Mahmoudidaryan , Bhushan Shanti Asuri , Sang-June Park , Shrenik Patel
IPC: H03M1/66
Abstract: Certain aspects of the present disclosure generally relate to circuitry and techniques for digital-to-analog conversion. One example system for digital-to-analog conversion generally includes a first digital-to-analog converter (DAC) having an input coupled to an input node of the system and a mixing-mode DAC having an input coupled to an input node of the system. The mixing-mode DAC may include a second DAC and a mixer, an output of the second DAC being coupled to an input of the mixer. The system may also include a combiner, wherein an output of the first DAC is coupled to a first input of the combiner, and wherein an output of the mixer is coupled to a second input of the combiner.
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公开(公告)号：US10454509B2
公开(公告)日：2019-10-22
申请号：US15962865
申请日：2018-04-25
Applicant: QUALCOMM Incorporated
Inventor： Bhushan Shanti Asuri , Krishnaswamy Thiagarajan , Ashok Swaminathan , Shahin Mehdizad Taleie , Yen-Wei Chang , Vinod Panikkath , Sameer Vasantlal Vora , Ayush Mittal , Tonmoy Biswas , Sy-Chyuan Hwu , Zhilong Tang , Ibrahim Chamas , Ping Wing Lai , Behnam Sedighi , Dongwon Seo , Nitz Saputra
Abstract: A communication circuit may include a first pair of digital-to-analog converters (DACs) coupled to an input of a first mixer and configured to generate first baseband signals. The communication circuit may further include a second pair of DACs coupled to an input of a second mixer and configured to generate second baseband signals. The second baseband signals may be shifted in phase relative to the first baseband signals.
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公开(公告)号：US09819357B1
公开(公告)日：2017-11-14
申请号：US15593081
申请日：2017-05-11
Applicant: QUALCOMM Incorporated
Inventor： Wei Guo , Sang Min Lee , Behnam Sedighi , Dongwon Seo
Abstract: The present disclosure describes aspects of current removal for digital-to-analog converters (DACs). In some aspects, a circuit for converting a digital input to an analog output includes a first resistor ladder having first resistors connectable to respective current sources and connected to a first output of the circuit. The circuit also includes second resistor ladder having second resistors connectable to the respective current sources and connected to a second output of the circuit. A common node is formed between common resistor terminals of the first resistor ladder and the second resistor ladder. Current removal circuitry is connected to the common node and referenced to an amount of current provided by the respective current sources. By removing current from the common node of the resistor ladders, common-mode current at outputs of the circuit can be reduced with minimal degradation of differential performance of the circuit.
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Patent Agency Ranking
公开(公告)号：US09379727B1
公开(公告)日：2016-06-28
申请号：US14628996
申请日：2015-02-23
Applicant: QUALCOMM Incorporated
Inventor： Dongwon Seo , Yang You , Honghao Ji , Tongyu Song , Ganesh Saripalli , Shahin Mehdizad Taleie
IPC: H03M1/06 , H03M1/70 , H04B1/04 , G05F3/18 , G05F1/56 , H03M1/00 , H03M1/74 , G05F1/575 , H02M3/156
CPC classification number: H03M1/0604 , G05F1/56 , G05F1/575 , G05F3/18 , H02M3/156 , H03F3/24 , H03M1/00 , H03M1/70 , H03M1/747 , H04B1/0475 , H04B2001/0408
Abstract: A method and apparatus for attenuating transmit digital to analog converter (DAC) spurs is provided. The method begins when a reference voltage is injected into an amplifier. Next, an output of the ground low drop-out regulator is measured and is them compared with the reference voltage. The output of the amplifier is then adjusted based on the results of the comparison. If the reference voltage is higher then the output of the ground low drop-out regulator the output of the amplifier is adjusted to ground. If the reference voltage is lower than the output of the ground low drop-out regulator then the output of the amplifier is adjusted to match the reference voltage.
Abstract translation: 提供了用于衰减发射数模转换器（DAC）杂散的方法和装置。 当将参考电压注入放大器时，该方法开始。 接下来，测量接地低压降稳压器的输出，并将其与参考电压进行比较。 然后根据比较结果调整放大器的输出。 如果参考电压较高，则接地低压降稳压器的输出将放大器的输出调整到地。 如果参考电压低于接地低压降稳压器的输出，则调节放大器的输出以匹配参考电压。
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17.发明授权公开(公告)号：US09337855B2
公开(公告)日：2016-05-10
申请号：US14532264
申请日：2014-11-04
Applicant: QUALCOMM Incorporated
Inventor： Ganesh Ramachandra Murthy Saripalli , Shahin Mehdizad Taleie , Michael Joseph McGowan , Jenny Kuo , Dongwon Seo , Jalal Ahmad Elhusseini
CPC classification number: H03M1/1009 , H03M1/1019 , H03M1/66 , H03M1/68 , H03M1/742
Abstract: A method and apparatus for a method of calibrating a transmit digital to analog converter full-scale current. The method comprises generating a tuned reference current and then calibrating the tuned reference current to a selected value in order to produce a predetermined current value. The calibration further comprises dividing a reference voltage input over a resistor string. A band gap current is then generated using the divided reference voltage input. A tuned current output is then produced from a current steering digital to analog converter with the tuned output current stored in a register. The reference current for the transmit DAC is then generated based on the stored tuned output current.
Abstract translation: 一种用于校准发射数模转换器满量程电流的方法和装置。 该方法包括产生调谐的参考电流，然后将调谐的参考电流校准到选定的值，以便产生预定的电流值。 该校准还包括对在电阻串上输入的参考电压进行分频。 然后使用划分的参考电压输入产生带隙电流。 然后，从调节输出电流存储在寄存器中的当前转向数字到模拟转换器产生调谐电流输出。 然后基于存储的调谐输出电流产生发射DAC的参考电流。
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18.发明申请TECHNIQUES TO REDUCE HARMONIC DISTORTIONS OF IMPEDANCE ATTENUATORS FOR LOW-POWER WIDEBAND HIGH-RESOLUTION DACS 有权减少低功耗宽带高分辨率DAC的阻抗衰减器谐波失真的技术公开(公告)号：US20140266830A1
公开(公告)日：2014-09-18
申请号：US13839763
申请日：2013-03-15
Applicant: QUALCOMM INCORPORATED
Inventor： Tongyu Song , Sang Min Lee , Derui Kong , Dongwon Seo
IPC: H03M1/74
CPC classification number: H03M1/74 , H03F3/19 , H03F3/211 , H03F3/245 , H03F3/45192 , H03F3/4565 , H03F3/72 , H03F2203/45466 , H03F2203/45512 , H03F2203/45562 , H03F2203/45631 , H03F2203/45634 , H03F2203/45644 , H03F2203/45686 , H03F2203/45701 , H03F2203/45702 , H03F2203/7236 , H03M1/0614
Abstract: A digital-to-analog converter (DAC) includes, in part, a multitude of input stages that supply currents to a pair of current summing nodes in response to a digital signal, and an impedance attenuator coupled between the current summing nodes and the output of the DAC. The impedance attenuator is adapted, among other function, to increase the range of impedances of the output load, to account for changes in the output load impedance due to variations in the process, voltage and temperature, and to decouple the impedances seen by the summing nodes from the load impedance. The impedance attenuator further includes a differential-input, differential-output amplifier with programmable common-mode gain bandwidth to control the harmonic distortion of the amplifier. The impedance attenuator optionally includes a pair of cross-coupled capacitors to control the harmonic distortion of the amplifier.
Abstract translation: 数模转换器（DAC）部分地包括响应于数字信号向一对当前求和节点提供电流的多个输入级，以及耦合在当前求和节点和输出端之间的阻抗衰减器 的DAC。 除了其他功能之外，阻抗衰减器还适用于增加输出负载的阻抗范围，以解决由于工艺，电压和温度的变化而导致的输出负载阻抗的变化，并且将由求和所看到的阻抗解耦 节点从负载阻抗。 阻抗衰减器还包括具有可编程共模增益带宽的差分输入差分输出放大器，以控制放大器的谐波失真。 阻抗衰减器可选地包括一对交叉耦合电容器，以控制放大器的谐波失真。
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公开(公告)号：US10663572B2
公开(公告)日：2020-05-26
申请号：US16012193
申请日：2018-06-19
Applicant: QUALCOMM Incorporated
Inventor： Shahin Mehdizad Taleie , Chen Jiang , Dongwon Seo , Udara Fernando , Shrenik Patel , Roberto Rimini , Anant Gupta
Abstract: Certain aspects of the present disclosure generally relate to a programmable multi-mode digital-to-analog converter (DAC) for generating a frequency-modulated signal. For example, certain aspects provide a circuit for sweeping a frequency of an output signal. The circuit generally includes a DAC having an input coupled to an input path of the circuit and an output coupled to an output path of the circuit, a first mixer selectively incorporated in the input path coupled to the input of the DAC, and a second mixer selectively incorporated in the output path coupled to the output of the DAC.
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公开(公告)号：US09705307B2
公开(公告)日：2017-07-11
申请号：US14606746
申请日：2015-01-27
Applicant: QUALCOMM Incorporated
Inventor： Honghao Ji , Dongwon Seo
CPC classification number: H02H3/18 , H01L27/0266 , H01L27/0292 , H02H11/003
Abstract: A reverse current protection (RCP) circuit is provided that includes an RCP switch coupled between a power supply rail and a buffer power supply node. A control circuit powered by a buffer supply voltage on the buffer power supply node controls the RCP switch to open in response to a discharge of a power supply voltage carried on the power supply rail.
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