公开(公告)号：US20160183386A1

公开(公告)日：2016-06-23

申请号：US14617864

申请日：2015-02-09

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu SONG ,  Layal ROUHANA ,  Kyu-Pyung HWANG ,  Omar James BCHIR

IPC: H05K3/46 ,  H05K3/32 ,  H05K1/11 ,  H05K1/18 ,  H05K1/02

CPC classification number: H05K3/4644 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0231 ,  H05K1/0234 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/113 ,  H05K1/114 ,  H05K1/115 ,  H05K1/167 ,  H05K1/181 ,  H05K3/1258 ,  H05K3/321 ,  H05K3/3442 ,  H05K3/4697 ,  H05K2201/0792 ,  H05K2201/09227 ,  H05K2201/09281 ,  H05K2201/09954 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2203/0545 ,  Y02P70/611

Abstract: Methods and apparatus for controlling an equivalent-series resistance (ESR) of a capacitor are provided. An exemplary apparatus includes a substrate having a land side, the capacitor mounted on the land side of the substrate and having both the ESR and terminals, a resistive pattern coupled to the terminals, and a plurality of vias coupled to the resistive pattern. The resistive pattern is configured to control the ESR. The resistive pattern can be formed of a resistive paste. The resistive pattern can be formed in a substantially semicircular shape having an arc ranging from substantially 45 degrees to substantially 135 degrees. The capacitor can be a surface mount device. The resistive pattern can be formed in a shape of a land-side capacitor mounting pad, a via, or both.

Abstract translation: 提供了用于控制电容器的等效串联电阻（ESR）的方法和装置。 示例性装置包括具有接地侧的基板，安装在基板的接地侧上并具有ESR和端子的电容器，耦合到端子的电阻图案以及耦合到电阻图案的多个通孔。 电阻模式被配置为控制ESR。 电阻图案可以由电阻浆料形成。 电阻图案可以形成为具有大致45度至基本上135度的弧度的大致半圆形状。 电容器可以是表面贴装器件。 电阻图案可以形成为陆侧电容器安装垫，通孔或两者的形状。

公开(公告)号：US20160049458A1

公开(公告)日：2016-02-18

申请号：US14459316

申请日：2014-08-14

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu SONG ,  Kyu-Pyung HWANG

IPC: H01L49/02

CPC classification number: H01L28/10

Abstract: A semiconductor structure according to some examples may include an LC component for use in PMIC applications. The semiconductor structure may have a first conductive coil mounted on an upper surface of a substrate, the first conductive coil surrounding a magnetic core; an output located on a surface of the first conductive coil and coupled to the coil; a dielectric layer located on a surface of the output; and an upper conductive element located on a surface of the dielectric layer, wherein the upper conductive element, the dielectric layer, and the output form a capacitor; and the first conductive coil and the magnetic core form an inductor. The semiconductor structure may also include a second conductive coil located in a same horizontal plane as the first conductive coil, the second conductive coil surrounding a magnetic core where the first conductive coil and the second conductive coil form a fishbone pattern.

Abstract translation: 根据一些示例的半导体结构可以包括用于PMIC应用中的LC组件。 半导体结构可以具有安装在基板的上表面上的第一导电线圈，第一导电线圈围绕磁芯; 输出，位于所述第一导电线圈的表面上并且耦合到所述线圈; 位于输出表面上的电介质层; 以及位于所述电介质层的表面上的上导电元件，其中所述上导电元件，所述电介质层和所述输出形成电容器; 并且第一导电线圈和磁芯形成电感器。 半导体结构还可以包括位于与第一导电线圈相同的水平平面中的第二导电线圈，第二导电线圈围绕磁芯，其中第一导电线圈和第二导电线圈形成鱼骨图案。

公开(公告)号：US20150091132A1

公开(公告)日：2015-04-02

申请号：US14042140

申请日：2013-09-30

Applicant: QUALCOMM Incorporated

Inventor： Dong Wook KIM ,  Kyu-Pyung HWANG ,  Young Kyu SONG ,  Changhan Hobie YUN

IPC: H01L21/52 ,  H01L23/04 ,  H01L21/48 ,  H01L49/02 ,  H01L23/13

CPC classification number: H01L21/52 ,  H01L21/4817 ,  H01L23/04 ,  H01L23/13 ,  H01L23/16 ,  H01L28/60 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00

Abstract: Systems and methods for preventing warpage of a semiconductor substrate in a semiconductor package. A continuous or uninterrupted stiffener structure is designed with a recessed groove, such that passive components, such as, high density capacitors are housed within the recessed groove. The stiffener structure with the recessed groove is attached to the semiconductor substrate using anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). The stiffener structure with the recessed groove surrounds one or more semiconductor devices that may be formed on the semiconductor substrate. The stiffener structure with the recessed groove does not extend beyond horizontal boundaries of the semiconductor substrate.

Abstract translation: 用于防止半导体封装中的半导体衬底翘曲的系统和方法。 连续或不间断的加强结构设计有凹槽，使得诸如高密度电容器的无源部件容纳在凹槽内。 具有凹槽的加强结构使用各向异性导电膜（ACF）或各向异性导电膏（ACP）附着到半导体衬底上。 具有凹槽的加强结构围绕可形成在半导体衬底上的一个或多个半导体器件。 具有凹槽的加强结构不延伸超过半导体衬底的水平边界。