Patent search ap:("SAMSUNG ELECTRO-MECHANICS CO. Page LTD.") AND inv:"Kee Ju Um"

11.

发明授权
Power semiconductor device and method of manufacturing the same 有权
Title translation: 功率半导体器件及其制造方法

公开(公告)号：US09153678B2

公开(公告)日：2015-10-06

申请号：US13871082

申请日：2013-04-26

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kee Ju Um , In Hyuk Song , Chang Su Jang , Jaehoon Park , Dong Soo Seo

IPC: H01L29/78 , H01L29/66 , H01L29/739 , H01L29/06

CPC classification number: H01L29/7397 , H01L29/0615 , H01L29/0619 , H01L29/0688 , H01L29/0847 , H01L29/1095 , H01L29/42372 , H01L29/4238 , H01L29/66348

Abstract: There is provided a power semiconductor device including a contact formed in an active region, a trench gate extendedly formed from the first region into a first termination region and formed alternately with the contact, a first conductive well formed between the contact of the active region and the trench gate, a first conductive well extending portion formed in the first termination region and a part of a second termination region, and a first conductive field limiting ring formed in the second termination region and contacting the well extending portion.

Abstract translation: 提供了一种功率半导体器件，包括形成在有源区中的触点，从第一区延伸形成第一终端区并与触点交替形成的沟槽栅，形成在有源区的触点和沟槽栅极，形成在第一端接区域中的第一导电阱延伸部分和第二端接区域的一部分，以及形成在第二端接区域中并接触阱延伸部分的第一导电场限制环。

12.

发明申请
POWER SEMICONDUCTOR DEVICE 有权
Title translation: 功率半导体器件

公开(公告)号：US20140145291A1

公开(公告)日：2014-05-29

申请号：US13795858

申请日：2013-03-12

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： In Hyuk Song , Kee Ju Um , Chang Su Jang , Jae Hoon Park , Dong Soo Seo

IPC: H01L29/06

CPC classification number: H01L29/402 , H01L29/0619 , H01L29/41741 , H01L29/66348 , H01L29/7397

Abstract: Disclosed herein is a power semiconductor device. The power semiconductor device includes a second conductive type first junction termination extension (JTE) layer that is formed so as to be in contact with one side of the second conductive type well layer, a second conductive type second JTE layer that is formed on the same line as the second conductive type first JTE layer, and is formed so as to be spaced apart from the second conductive type first JTE layer in a length direction of the substrate, and a poly silicon layer that is formed so as to be in contact with the second conductive type well layer and an upper portion of the second conductive type first JTE layer.

Abstract translation: 这里公开了功率半导体器件。功率半导体器件包括形成为与第二导电类型阱层的一侧接触的第二导电型第一结端接延伸（JTE）层，形成在其上的第二导电型第二JTE层线作为第二导电型第一JTE层，并且形成为在基板的长度方向上与第二导电型第一JTE层间隔开，并且形成为与第二导电型第一JTE层接触的多晶硅层第二导电类型阱层和第二导电型第一JTE层的上部。

13.

发明授权
Power semiconductor device and method of manufacturing the same 有权

公开(公告)号：US09627470B2

公开(公告)日：2017-04-18

申请号：US14301328

申请日：2014-06-10

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： In Hyuk Song , Jae Hoon Park , Kee Ju Um , Dong Soo Seo

IPC: H01L27/088 , H01L29/06 , H01L29/66 , H01L29/78 , H01L29/739 , H01L29/10

CPC classification number: H01L29/063 , H01L29/0611 , H01L29/0634 , H01L29/0649 , H01L29/1095 , H01L29/66333 , H01L29/66712 , H01L29/7395 , H01L29/7802

Abstract: There is provided a power semiconductor device including: a first semiconductor region of a first conductivity type; second semiconductor regions formed in the first semiconductor region and being of a second conductivity type; a well region formed above the second semiconductor regions and being of the second conductivity type; and a source region formed in the well region and being of the first conductivity type, wherein the second semiconductor regions include 1 to n layers formed from a lower portion of the device extending a in a direction of height of the device, and in the case that the widest width of the of the second semiconductor region of the nth layer is Pn, P1

14.

发明授权
Power module package including heat spreader and inductance coil 有权
Title translation: 功率模块封装包括散热器和电感线圈

公开(公告)号：US09466589B2

公开(公告)日：2016-10-11

申请号：US14661844

申请日：2015-03-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kwang Soo Kim , Young Hoon Kwak , Chang Seob Hong , Joon Seok Chae , Kee Ju Um

IPC: H01L23/522 , H01L25/065 , H01L23/367 , H01L23/36 , H01L23/373 , H01L23/552

CPC classification number: H01L25/0655 , H01L23/36 , H01L23/3735 , H01L23/552 , H01L2224/48091 , H01L2224/49111 , H01L2924/00014

Abstract: There is provided a power module package. The power module package includes: a base substrate provided with a pattern; a heat spreader formed by being stacked on an upper surface of the base substrate; and at least one first semiconductor device mounted on an upper surface of the heat spreader, wherein an outer circumferential surface of the heat spreader is provided with a coil.

Abstract translation: 提供了一个电源模块封装。功率模块封装包括：具有图案的基底基板; 散热器，其通过堆叠在所述基底基板的上表面上而形成; 以及安装在散热器的上表面上的至少一个第一半导体器件，其中散热器的外圆周表面设置有线圈。

15.

发明授权
Semiconductor device, method of manufacturing the same and power semiconductor device including the same 有权
Title translation: 半导体装置及其制造方法以及包括该半导体装置的功率半导体装置

公开(公告)号：US09287363B2

公开(公告)日：2016-03-15

申请号：US14273269

申请日：2014-05-08

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hoon Park , In Hyuk Song , Chang Su Jang , Kee Ju Um

IPC: H01L29/16 , H01L21/04 , H01L29/78 , H01L29/51 , H01L29/49

CPC classification number: H01L29/1608 , H01L21/049 , H01L29/4916 , H01L29/518 , H01L29/66068 , H01L29/78

Abstract: A method of manufacturing a semiconductor device may include: preparing a substrate formed of SiC; depositing crystalline or amorphous silicon (Si) on one surface of the substrate to form a first semiconductor layer; and performing a heat treatment under a nitrogen atmosphere to form a second semiconductor layer formed of SiCN between the substrate and the first semiconductor layer.

Abstract translation: 制造半导体器件的方法可以包括：制备由SiC形成的衬底; 在所述衬底的一个表面上沉积晶体或非晶硅（Si）以形成第一半导体层; 并在氮气气氛下进行热处理，以在衬底和第一半导体层之间形成由SiCN形成的第二半导体层。

16.

发明授权
Power semiconductor device and method for manufacturing the same 有权
Title translation: 功率半导体器件及其制造方法

公开(公告)号：US09147757B2

公开(公告)日：2015-09-29

申请号：US13874038

申请日：2013-04-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kee Ju Um , Dong Soo Seo , Chang Su Jang , In Hyuk Song , Jaehoon Park

IPC: H01L29/74 , H01L29/739 , H01L29/66 , H01L29/40 , H01L29/06

CPC classification number: H01L29/7395 , H01L29/0619 , H01L29/0638 , H01L29/404 , H01L29/423 , H01L29/66333

Abstract: There is provided a power semiconductor device, including: a first conductive type drift layer, a second conductive type termination layer formed on an upper portion of an edge of the drift layer, and a high concentration first conductive type channel stop layer formed on a side surface of the edge of the drift layer.

Abstract translation: 提供了一种功率半导体器件，包括：第一导电型漂移层，形成在漂移层的边缘的上部上的第二导电型端接层和形成在侧面的高浓度第一导电型沟道阻挡层漂移层边缘的表面。

17.

发明申请
POWER SEMICONDUCTOR DEVICE 审中-公开
Title translation: 功率半导体器件

公开(公告)号：US20150187869A1

公开(公告)日：2015-07-02

申请号：US14272009

申请日：2014-05-07

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hoon PARK , Kyu Hyun Mo , Jae Kyu Sung , Kee Ju Um , In Hyuk Song

IPC: H01L29/06 , H01L29/10 , H01L29/739

CPC classification number: H01L29/063 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/7397 , H01L29/74 , H01L29/7802 , H01L29/7813

Abstract: A power semiconductor device may include: a first conductivity-type first semiconductor region; a resurf region disposed in the first semiconductor region and including first conductivity-type second semiconductor regions and second conductivity-type third semiconductor regions alternately disposed in a width direction; a first conductivity-type first cover region disposed in the first semiconductor region, disposed to be contiguous with an upper surface of the resurf region, and having an impurity concentration higher than that of the first semiconductor region; a second conductivity-type fourth semiconductor region disposed above the first semiconductor region; a first conductivity-type fifth semiconductor region disposed on an inner side of an upper portion of the fourth semiconductor region; and a trench gate disposed to penetrate from the fifth semiconductor region to a portion of an upper portion of the first semiconductor region and including a gate insulating layer and a conductive material.

Abstract translation: 功率半导体器件可以包括：第一导电类型的第一半导体区域; 设置在所述第一半导体区域中并且包括在宽度方向上交替布置的第一导电类型的第二半导体区域和第二导电类型的第三半导体区域的再生区域; 设置在所述第一半导体区域中的第一导电类型的第一覆盖区域，被设置为与所述复原区域的上表面邻接，并且具有高于所述第一半导体区域的杂质浓度的杂质浓度; 设置在所述第一半导体区域上方的第二导电型第四半导体区域; 设置在第四半导体区域的上部的内侧的第一导电型第五半导体区域; 以及沟槽栅极，设置成从第五半导体区域穿透到第一半导体区域的上部的一部分，并且包括栅极绝缘层和导电材料。

18.

发明授权
Power semiconductor device and method of fabricating the same 有权
Title translation: 功率半导体器件及其制造方法

公开(公告)号：US08981423B2

公开(公告)日：2015-03-17

申请号：US13937589

申请日：2013-07-09

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Dong Soo Seo , Jaehoon Park , Kee Ju Um , Chang Su Jang , In Hyuk Song

IPC: H01L29/66 , H01L29/739

CPC classification number: H01L29/7395 , H01L29/0696 , H01L29/1095 , H01L29/513 , H01L29/518 , H01L29/66348 , H01L29/7397

Abstract: There is provided a power semiconductor device, including a plurality of trench gates formed to be spaced apart from each other by a predetermined distance, a current increasing part formed between the trench gates and including a first conductivity-type emitter layer and a gate oxide formed on a surface of the trench gate, and an immunity improving part formed between the trench gates and including a second conductivity-type body layer, a preventing film formed on the surface of the trench gate, and a gate oxide having a thickness less than that the gate oxide of the current increasing part.

Abstract translation: 提供了一种功率半导体器件，包括形成为彼此间隔开预定距离的多个沟槽栅极，形成在沟槽栅极之间并包括第一导电型发射极层和形成的栅极氧化物的电流增加部分在所述沟槽栅极的表面上形成的抗扰度改善部以及形成在所述沟槽栅极之间并且包括第二导电型体层的抗扰度改善部，以及形成在所述沟槽栅极的表面上的防止膜和厚度小于所述沟槽栅极的厚度的栅极氧化物。电流增加部分的栅极氧化物。