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公开(公告)号：US09252212B2
公开(公告)日：2016-02-02
申请号：US14243873
申请日：2014-04-02
发明人： Jae Hoon Park , Ji Hye Kim , Kyu Hyun Mo , Dong Soo Seo , In Hyuk Song
IPC分类号： H01L29/66 , H01L29/06 , H01L29/739 , H01L29/10
CPC分类号： H01L29/063 , H01L29/1095 , H01L29/7397
摘要： A power semiconductor device may include: an active region in which a current flows through a channel formed when the device being turned on; a termination region disposed around the active region; a first semiconductor region of a first conductive type disposed in the termination region in a direction from the active region to the termination region; and a second semiconductor region of a second conductive type disposed in the termination region in the direction from the active region to the termination region, the first semiconductor region and the second semiconductor region being disposed alternately.
摘要翻译： 功率半导体器件可以包括：有源区域，其中电流流过当器件导通时形成的沟道; 设置在所述有源区域周围的端接区域; 第一导电类型的第一半导体区域，设置在从所述有源区域到所述端接区域的方向上的所述端接区域中; 以及第二导电类型的第二半导体区域，其设置在从所述有源区域到所述端接区域的方向上的所述端接区域中，所述第一半导体区域和所述第二半导体区域交替布置。
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公开(公告)号：US09076811B2
公开(公告)日：2015-07-07
申请号：US14149578
申请日：2014-01-07
发明人： In Hyuk Song , Jae Hoon Park , Dong Soo Seo
IPC分类号： H01L29/78 , H01L29/66 , H01L29/423 , H01L29/739 , H01L21/265 , H01L29/36 , H01L21/22
CPC分类号： H01L29/6634 , H01L21/046 , H01L21/22 , H01L21/2253 , H01L21/265 , H01L21/3081 , H01L21/324 , H01L29/0847 , H01L29/1095 , H01L29/36 , H01L29/4236 , H01L29/66325 , H01L29/66348 , H01L29/66674 , H01L29/7393 , H01L29/7397 , H01L29/7825
摘要： Disclosed herein is a power semiconductor device including: a base substrate having one surface and the other surface and formed of a first conductive type drift layer; a first conductive type diffusion layer formed on one surface of the base substrate and having a concentration higher than that of the first conductive type drift layer; and a trench formed so as to penetrate through the second conductive type well layer and the first conductive type diffusion layer from one surface of the base substrate including the second conductive type well layer in a thickness direction.
摘要翻译： 本发明公开了一种功率半导体器件，包括：具有一个表面和另一个表面并由第一导电型漂移层形成的基底基板; 形成在所述基底基板的一个表面上并且具有比所述第一导电型漂移层的浓度高的浓度的第一导电型扩散层; 以及形成为从厚度方向包括第二导电类型阱层的基底基板的一个表面穿过第二导电类型阱层和第一导电型扩散层的沟槽。
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公开(公告)号：US20150187922A1
公开(公告)日：2015-07-02
申请号：US14274249
申请日：2014-05-09
发明人： In Hyuk SONG , Ji Yeon Oh , Ji Hye Kim , Sun Jae Yoon , Jae Hoon Park
IPC分类号： H01L29/739 , H01L29/10
CPC分类号： H01L29/7397 , H01L29/42368
摘要： A power semiconductor device may include: a first conductivity-type drift region in which a plurality of trench gates each including a gate insulating layer disposed on a surface thereof and a conductive material filling the interior thereof are disposed; a second conductivity-type body region disposed on an inner side of an upper portion of the drift region and disposed to be in contact with the trench gate; a first conductivity-type emitter region disposed on an inner side of an upper portion of the body region and disposed to be in contact with the trench gate; and a hole accumulation region disposed in the drift region, disposed below the body region, and disposed between the trench gates.
摘要翻译： 功率半导体器件可以包括：第一导电型漂移区，其中设置有各自包括设置在其表面上的栅极绝缘层的多个沟槽栅极和填充在其内部的导电材料; 第二导电型体区域，其设置在所述漂移区域的上部的内侧，并设置成与所述沟槽栅极接触; 第一导电型发射极区域，设置在所述主体区域的上部的内侧并且设置成与所述沟槽栅极接触; 以及设置在所述漂移区域中的空穴积聚区域，设置在所述主体区域的下方，并且设置在所述沟槽栅极之间。
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公开(公告)号：US20140117407A1
公开(公告)日：2014-05-01
申请号：US14149578
申请日：2014-01-07
发明人： In Hyuk Song , Jae Hoon Park , Dong Soo Seo
IPC分类号： H01L29/66 , H01L21/265 , H01L29/739
CPC分类号： H01L29/6634 , H01L21/046 , H01L21/22 , H01L21/2253 , H01L21/265 , H01L21/3081 , H01L21/324 , H01L29/0847 , H01L29/1095 , H01L29/36 , H01L29/4236 , H01L29/66325 , H01L29/66348 , H01L29/66674 , H01L29/7393 , H01L29/7397 , H01L29/7825
摘要： Disclosed herein is a power semiconductor device including: a base substrate having one surface and the other surface and formed of a first conductive type drift layer; a first conductive type diffusion layer formed on one surface of the base substrate and having a concentration higher than that of the first conductive type drift layer; and a trench formed so as to penetrate through the second conductive type well layer and the first conductive type diffusion layer from one surface of the base substrate including the second conductive type well layer in a thickness direction.
摘要翻译： 本发明公开了一种功率半导体器件，包括：具有一个表面和另一个表面并由第一导电型漂移层形成的基底基板; 形成在所述基底基板的一个表面上并且具有比所述第一导电型漂移层的浓度高的浓度的第一导电型扩散层; 以及形成为从厚度方向包括第二导电类型阱层的基底基板的一个表面穿过第二导电型阱层和第一导电型扩散层的沟槽。
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公开(公告)号：US20140061717A1
公开(公告)日：2014-03-06
申请号：US13688320
申请日：2012-11-29
发明人： In Hyuk Song , Jae Hoon Park , Dong Soo Seo
IPC分类号： H01L29/739 , H01L29/66
CPC分类号： H01L29/6634 , H01L21/046 , H01L21/22 , H01L21/2253 , H01L21/265 , H01L21/3081 , H01L21/324 , H01L29/0847 , H01L29/1095 , H01L29/36 , H01L29/4236 , H01L29/66325 , H01L29/66348 , H01L29/66674 , H01L29/7393 , H01L29/7397 , H01L29/7825
摘要： Disclosed herein is a power semiconductor device including: a base substrate having one surface and the other surface and formed of a first conductive type drift layer; a first conductive type diffusion layer formed on one surface of the base substrate and having a concentration higher than that of the first conductive type drift layer; and a trench formed so as to penetrate through the second conductive type well layer and the first conductive type diffusion layer from one surface of the base substrate including the second conductive type well layer in a thickness direction.
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公开(公告)号：US09627470B2
公开(公告)日：2017-04-18
申请号：US14301328
申请日：2014-06-10
发明人： In Hyuk Song , Jae Hoon Park , Kee Ju Um , Dong Soo Seo
IPC分类号： H01L27/088 , H01L29/06 , H01L29/66 , H01L29/78 , H01L29/739 , H01L29/10
CPC分类号： H01L29/063 , H01L29/0611 , H01L29/0634 , H01L29/0649 , H01L29/1095 , H01L29/66333 , H01L29/66712 , H01L29/7395 , H01L29/7802
摘要： There is provided a power semiconductor device including: a first semiconductor region of a first conductivity type; second semiconductor regions formed in the first semiconductor region and being of a second conductivity type; a well region formed above the second semiconductor regions and being of the second conductivity type; and a source region formed in the well region and being of the first conductivity type, wherein the second semiconductor regions include 1 to n layers formed from a lower portion of the device extending a in a direction of height of the device, and in the case that the widest width of the of the second semiconductor region of the nth layer is Pn, P1
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公开(公告)号：US09502498B2
公开(公告)日：2016-11-22
申请号：US14617158
申请日：2015-02-09
发明人： Kyu Hyun Mo , Dong Soo Seo , Chang Su Jang , Jae Hoon Park , In Hyuk Song
IPC分类号： H01L29/66 , H01L29/06 , H01L29/78 , H01L29/423
CPC分类号： H01L29/0634 , H01L29/0865 , H01L29/1095 , H01L29/42356 , H01L29/7397 , H01L29/7813 , H01L29/7827
摘要： A power semiconductor device may include a first conductivity type semiconductor substrate, a super-junction portion disposed on the first conductivity type semiconductor substrate and including a first conductivity type pillar and a second conductivity type pillar arranged in an alternating manner, and a three-dimensional (3D) gate portion disposed on the first conductivity type pillar. The 3D gate portion is disposed on the first conductivity type pillar to reduce the widths of the first and second conductivity type pillars, thereby effectively reducing a device size.
摘要翻译： 功率半导体器件可以包括第一导电类型半导体衬底，设置在第一导电类型半导体衬底上的超接合部分，并且包括交替排列的第一导电型柱和第二导电型柱，并且三维 （3D）门部分，设置在第一导电型柱上。 3D栅极部分设置在第一导电型柱上以减小第一和第二导电型柱的宽度，从而有效地减小了器件尺寸。
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8.发明授权Semiconductor device, method of manufacturing the same and power semiconductor device including the same 有权半导体装置及其制造方法以及包括该半导体装置的功率半导体装置公开(公告)号：US09287363B2
公开(公告)日：2016-03-15
申请号：US14273269
申请日：2014-05-08
发明人： Jae Hoon Park , In Hyuk Song , Chang Su Jang , Kee Ju Um
CPC分类号： H01L29/1608 , H01L21/049 , H01L29/4916 , H01L29/518 , H01L29/66068 , H01L29/78
摘要： A method of manufacturing a semiconductor device may include: preparing a substrate formed of SiC; depositing crystalline or amorphous silicon (Si) on one surface of the substrate to form a first semiconductor layer; and performing a heat treatment under a nitrogen atmosphere to form a second semiconductor layer formed of SiCN between the substrate and the first semiconductor layer.
摘要翻译： 制造半导体器件的方法可以包括：制备由SiC形成的衬底; 在所述衬底的一个表面上沉积晶体或非晶硅（Si）以形成第一半导体层; 并在氮气气氛下进行热处理，以在衬底和第一半导体层之间形成由SiCN形成的第二半导体层。
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9.发明授权公开(公告)号：US09263560B2
公开(公告)日：2016-02-16
申请号：US14273341
申请日：2014-05-08
发明人： Jae Hoon Park , Jae Kyu Sung , In Hyuk Song , Ji Yeon Oh , Dong Soo Seo
IPC分类号： H01L29/00 , H01L29/739 , H01L29/66 , H01L29/78 , H01L29/74 , H01L29/06 , H01L29/423
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/4236 , H01L29/66348 , H01L29/66734 , H01L29/74 , H01L29/7813 , H01L29/7827
摘要： A power semiconductor device may include a first conductivity type first semiconductor region; a second conductivity type second semiconductor region formed on an upper portion of the first semiconductor region; a first conductivity type third semiconductor region formed in an upper inner side of the second semiconductor region; a trench gate formed to penetrate through a portion of the first semiconductor region from the third semiconductor region; and a first conductivity type fourth semiconductor region formed below the second semiconductor region while being spaced apart from the trench gate.
摘要翻译： 功率半导体器件可以包括第一导电类型的第一半导体区域; 形成在所述第一半导体区域的上部的第二导电类型的第二半导体区域; 形成在第二半导体区域的上内侧的第一导电型第三半导体区域; 形成为从第三半导体区域穿过第一半导体区域的一部分的沟槽栅极; 以及在与所述沟槽栅极间隔开的状态下，形成在所述第二半导体区域的下方的第一导电型第四半导体区域
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公开(公告)号：US20150144992A1
公开(公告)日：2015-05-28
申请号：US14280464
申请日：2014-05-16
发明人： Chang Su JANG , In Hyuk Song , Jae Hoon Park , Dong Soo Seo
CPC分类号： H01L29/73 , H01L29/0615 , H01L29/0878 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要： A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; an termination region formed in the vicinity of the active region; a plurality of trenches formed in a length direction of the active region; a first conductivity type hole accumulating region formed below the channel in the active region; and a first conductivity type electric field limiting region formed in the termination region. The electric field limiting region is formed so as to at least partially cover a trench positioned at a boundary between the active region and the termination region.
摘要翻译： 功率半导体器件可以包括：在功率半导体器件的导通操作时具有流过其中形成的沟道的电流的有源区; 形成在有源区附近的端接区域; 在所述有源区的长度方向上形成的多个沟槽; 在所述有源区中形成在所述沟道下方的第一导电型孔积存区; 以及形成在终端区域中的第一导电型电场限制区域。 电场限制区域形成为至少部分地覆盖位于有源区域和端接区域之间的边界处的沟槽。
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