中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

30 records (took 0.015 seconds)

    Insulated gate bipolar transistor
    1.
    发明授权
    Insulated gate bipolar transistor 有权
    绝缘栅双极晶体管

    公开(公告)号：US09318589B2

    公开(公告)日：2016-04-19

    申请号：US13751916

    申请日：2013-01-28

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Jaehoon Park ,  Chang Su Jang ,  In Hyuk Song ,  Kee Ju Um ,  Dong Soo Seo

    IPC: H01L29/739 ,  H01L29/10

    CPC classification number: H01L29/7397 ,  H01L29/1095

    Abstract: There is provided an insulated gate bipolar transistor including: a first semiconductor area of a first conductivity type; a second semiconductor area of a second conductivity type formed on one surface of the first semiconductor area; third semiconductor areas of the first conductivity type continuously formed in a length direction on one surface of the second semiconductor area; a plurality of trenches formed between the third semiconductor areas, extending to an inside of the second semiconductor area, and being continuous in the length direction; a fourth semiconductor area of the second conductivity type formed on one surface of the third semiconductor areas, insulation layers formed inside the trenches; gate electrodes buried inside the insulation layers; and a barrier layer formed in at least one of locations corresponding to the third semiconductor areas inside the second semiconductor area.

    Abstract translation: 提供了一种绝缘栅双极晶体管，包括：第一导电类型的第一半导体区域; 形成在第一半导体区域的一个表面上的第二导电类型的第二半导体区域; 在第二半导体区域的一个表面上沿长度方向连续形成的第一导电类型的第三半导体区域; 多个沟槽，形成在第三半导体区域之间，延伸到第二半导体区域的内部，并且在长度方向上是连续的; 形成在第三半导体区域的一个表面上的第二导电类型的第四半导体区域，形成在沟槽内的绝缘层; 掩埋在绝缘层内的栅电极; 以及形成在与所述第二半导体区域内的所述第三半导体区域对应的位置中的至少一个的阻挡层。

    POWER SEMICONDUCTOR DEVICE
    2.
    发明申请
    POWER SEMICONDUCTOR DEVICE 审中-公开
    功率半导体器件

    公开(公告)号：US20150187678A1

    公开(公告)日：2015-07-02

    申请号：US14270894

    申请日：2014-05-06

    Applicant: Samsung Electro-Mechanics Co., Ltd.

    Inventor： Jae Hoon PARK ,  Sun Jae Yoon ,  Chang Su Jang ,  Kee Ju Um ,  In Hyuk Song

    IPC: H01L23/373

    CPC classification number: H01L23/367 ,  H01L29/0834 ,  H01L29/7397 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00

    Abstract: A power semiconductor device may include: a first conductivity-type first semiconductor layer; a second conductivity-type second semiconductor layer disposed above the first semiconductor layer; and a heat dissipation trench disposed to penetrate from an upper surface of the second semiconductor layer into a portion of the second semiconductor layer and having an insulating layer disposed on a surface thereof.

    Abstract translation: 功率半导体器件可以包括：第一导电型第一半导体层; 设置在所述第一半导体层上方的第二导电型第二半导体层; 以及散热沟，其设置成从所述第二半导体层的上表面穿透到所述第二半导体层的一部分中，并且具有设置在其表面上的绝缘层。

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09281389B2

    公开(公告)日：2016-03-08

    申请号：US13758917

    申请日：2013-02-04

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Jae Hoon Park ,  In Hyuk Song ,  Dong Soo Seo ,  Kwang Soo Kim ,  Kee Ju Um

    IPC: H01L29/15 ,  H01L29/778 ,  H01L29/06 ,  H01L29/20

    CPC classification number: H01L29/7787 ,  H01L29/0634 ,  H01L29/2003

    Abstract: Disclosed herein is a semiconductor device including: a source electrode formed on one side of an N-type AlGaN layer; N-type and P-type AlGaN layers formed on the other side of the P-type AlGaN layer and formed in a direction perpendicular to the source electrode; a gate electrode formed on one side of the N-type and P-type AlGaN layers; and a drain electrode formed on the other side of the N-type and P-type AlGaN layers.

    Abstract translation: 本发明公开了一种半导体器件，包括：形成在N型AlGaN层一侧的源电极; 在P型AlGaN层的另一侧形成并且沿垂直于源电极的方向形成的N型和P型AlGaN层; 形成在N型和P型AlGaN层一侧的栅电极; 以及形成在N型和P型AlGaN层的另一侧的漏电极。

    POWER SEMICONDUCTOR DEVICE
    5.
    发明申请
    POWER SEMICONDUCTOR DEVICE 审中-公开
    功率半导体器件

    公开(公告)号：US20150060999A1

    公开(公告)日：2015-03-05

    申请号：US14451030

    申请日：2014-08-04

    Applicant: Samsung Electro-Mechanics Co., Ltd.

    Inventor： Dong Soo SEO ,  Jae Hoon Park ,  In Hyuk Song ,  Ji Yeon Oh ,  Kee Ju Um

    IPC: H01L29/739

    CPC classification number: H01L29/7397 ,  H01L29/0878 ,  H01L29/42376 ,  H01L29/435 ,  H01L29/4983 ,  H01L29/7813

    Abstract: A power semiconductor device may include: a drift layer having a first conductivity; a hole accumulating layer formed on the drift layer and having the first conductivity; a well layer formed on the hole accumulating layer and having a second conductivity; an emitter region formed in an internal portion of an upper portion of the well layer and having the first conductivity; and trench gates penetrating through the emitter region, the well layer, and the hole accumulating layer, and having a gate insulating layer formed on a surface thereof. The trench gate may be sequentially divided into a first gate part, a second gate part, and a third gate part from an upper portion thereof depending on a height of a material filled in the trench gate, the first to third gate parts having different resistances from each other.

    Abstract translation: 功率半导体器件可以包括：具有第一导电性的漂移层; 形成在漂移层上并具有第一导电性的孔积聚层; 形成在所述蓄积层上并具有第二导电性的阱层; 发射极区，形成在所述阱层的上部的内部，并具有第一导电性; 以及穿过发射极区域，阱层和空穴积聚层的沟槽栅极，并且在其表面上形成栅极绝缘层。 沟槽栅极可以根据填充在沟槽栅极中的材料的高度从其上部依次分为第一栅极部分，第二栅极部分和第三栅极部分，第一至第三栅极部分具有不同的电阻 从彼此。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140117373A1

    公开(公告)日：2014-05-01

    申请号：US13758917

    申请日：2013-02-04

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Jae Hoon Park ,  In Hyuk Song ,  Dong Soo Seo ,  Kwang Soo Kim ,  Kee Ju Um

    IPC: H01L29/78 ,  H01L29/20

    CPC classification number: H01L29/7787 ,  H01L29/0634 ,  H01L29/2003

    Abstract: Disclosed herein is a semiconductor device including: a source electrode formed on one side of an N-type AlGaN layer; N-type and P-type AlGaN layers formed on the other side of the P-type AlGaN layer and formed in a direction perpendicular to the source electrode; a gate electrode formed on one side of the N-type and P-type AlGaN layers; and a drain electrode formed on the other side of the N-type and P-type AlGaN layers.

    Abstract translation: 本发明公开了一种半导体器件，包括：形成在N型AlGaN层一侧的源电极; 在P型AlGaN层的另一侧形成并且沿垂直于源电极的方向形成的N型和P型AlGaN层; 形成在N型和P型AlGaN层一侧的栅电极; 以及形成在N型和P型AlGaN层的另一侧的漏电极。

    PRINTED CIRCUIT BOARD
    8.
    发明申请
    PRINTED CIRCUIT BOARD 有权

    公开(公告)号：US20250024601A1

    公开(公告)日：2025-01-16

    申请号：US18657425

    申请日：2024-05-07

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Jin Uk Lee ,  Tae Kyung Lee ,  Kee Ju Um ,  Min Gyu Park ,  Young Hun You

    IPC: H05K1/11 ,  H05K1/18

    Abstract: A printed circuit board includes a substrate portion including a first insulating layer, and a first wiring layer disposed on or in the first insulating layer, and a connection structure disposed on or in the substrate portion, the connection structure including a plurality of first dielectric layers, first and second metal layers respectively disposed on the plurality of first dielectric layers, a second insulating layer disposed on the plurality of first dielectric layers, and a second wiring layer disposed on the second insulating layer. Each of the plurality of first dielectric layers includes an organic material. A distance between the first metal layer and the second metal layer is less than a distance between the first metal layer and the second wiring layer.

    Power semiconductor device
    9.
    发明授权
    Power semiconductor device 有权
    功率半导体器件

    公开(公告)号：US09318599B2

    公开(公告)日：2016-04-19

    申请号：US14331603

    申请日：2014-07-15

    Applicant: Samsung Electro-Mechanics Co., Ltd.

    Inventor： Jae Kyu Sung ,  Jae Hoon Park ,  Kee Ju Um ,  In Hyuk Song

    IPC: H01L29/78 ,  H01L29/423 ,  H01L29/10 ,  H01L29/06

    CPC classification number: H01L29/7813 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/7397

    Abstract: A power semiconductor device may include: a first conductive type drift layer in which trench gates are formed; a second conductive type well region formed on the drift layer so as to contact the trench gate; a first conductive type source region formed on the well region so as to contact the trench gate; and a device protection region formed below a height of a lowermost portion of the source region in a height direction.

    Abstract translation: 功率半导体器件可以包括：形成有沟槽栅极的第一导电型漂移层; 形成在所述漂移层上以与所述沟槽栅极接触的第二导电类型阱区; 形成在所述阱区上以便与所述沟槽栅极接触的第一导电型源极区; 以及在高度方向上形成在源极区域的最下部的高度以下的器件保护区域。

    Power semiconductor device capable of maintaining a withstand voltage
    10.
    发明授权
    Power semiconductor device capable of maintaining a withstand voltage 有权
    能够保持耐压的功率半导体器件

    公开(公告)号：US09184247B2

    公开(公告)日：2015-11-10

    申请号：US13795858

    申请日：2013-03-12

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： In Hyuk Song ,  Kee Ju Um ,  Chang Su Jang ,  Jae Hoon Park ,  Dong Soo Seo

    IPC: H01L29/732 ,  H01L29/739 ,  H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L29/06

    CPC classification number: H01L29/402 ,  H01L29/0619 ,  H01L29/41741 ,  H01L29/66348 ,  H01L29/7397

    Abstract: Disclosed herein is a power semiconductor device. The power semiconductor device includes a second conductive type first junction termination extension (JTE) layer that is formed so as to be in contact with one side of the second conductive type well layer, a second conductive type second JTE layer that is formed on the same line as the second conductive type first JTE layer, and is formed so as to be spaced apart from the second conductive type first JTE layer in a length direction of the substrate, and a poly silicon layer that is formed so as to be in contact with the second conductive type well layer and an upper portion of the second conductive type first JTE layer.

    Abstract translation: 这里公开了功率半导体器件。 功率半导体器件包括形成为与第二导电类型阱层的一侧接触的第二导电型第一结端接延伸（JTE）层，形成在其上的第二导电型第二JTE层 线作为第二导电型第一JTE层，并且形成为在基板的长度方向上与第二导电型第一JTE层间隔开，并且形成为与第二导电型第一JTE层接触的多晶硅层 第二导电类型阱层和第二导电型第一JTE层的上部。

Patent Agency Ranking