公开(公告)号：US20180286790A1

公开(公告)日：2018-10-04

申请号：US16001430

申请日：2018-06-06

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jung Hyun CHO ,  Yong Ho BAEK ,  Jun Oh HWANG ,  Joo Hwan JUNG ,  Moon Hee YI

IPC: H01L23/495 ,  H01L23/367 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522

CPC classification number: H01L23/49503 ,  H01L23/3107 ,  H01L23/3677 ,  H01L23/5226 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24195 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15172 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

公开(公告)号：US20210345491A1

公开(公告)日：2021-11-04

申请号：US17374409

申请日：2021-07-13

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jung Hyun PARK ,  Yong Ho BAEK ,  Jae Hoon CHOI

IPC: H05K1/18

Abstract: There is provided a printed circuit board including: a first insulating layer; a first circuit pattern formed on a first surface of the first insulating layer; an adhesive layer provided on a second surface of the first insulating layer; and an electronic component disposed on the adhesive layer and enclosed by the first insulating layer and a second insulating layer formed on the first insulating layer.

公开(公告)号：US20190221917A1

公开(公告)日：2019-07-18

申请号：US16105435

申请日：2018-08-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Il KIM ,  Yong Ho BAEK ,  Won Wook SO ,  Young Sik HUR

IPC: H01Q1/22 ,  H01Q9/04 ,  H01Q1/50 ,  H01Q19/10 ,  H01L23/66 ,  H01L23/31 ,  H01L25/16 ,  H01L23/00

CPC classification number: H01Q1/2283 ,  H01L21/4857 ,  H01L23/3121 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/66 ,  H01L24/16 ,  H01L24/24 ,  H01L25/16 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/24265 ,  H01L2924/1421 ,  H01Q1/50 ,  H01Q9/0407 ,  H01Q19/10

Abstract: An antenna module includes a connection member including at least one wiring layer and at least one insulating layer; an integrated circuit (IC) disposed on a first surface of the connection member and electrically connected to at least one wiring layer; and an antenna package disposed on a second surface of the connection member, and including a dielectric layer, a plurality of antenna members, and a plurality of feed vias, wherein the antenna package further includes a chip antenna including a dielectric body and first and second electrodes, respectively disposed on first and second surfaces of the dielectric body, wherein the chip antenna is disposed to be spaced apart from the plurality of feed vias within the dielectric layer so that at least one of the first electrode or the second electrode is electrically connected to a corresponding wire of the at least one wiring layer.

公开(公告)号：US20190181172A1

公开(公告)日：2019-06-13

申请号：US15958625

申请日：2018-04-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jong Rok KIM ,  Yong Ho BAEK ,  Jung Hyun CHO ,  Min Keun KIM ,  Jung Chul GONG ,  Young Sik HUR

IPC: H01L27/146 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31

Abstract: A fan-out sensor package includes: an image sensor chip including an integrated circuit (IC) for an image sensor having a first surface having first connection pads disposed thereon, a second surface opposing the first surface and having second connection pads disposed thereon, and through-silicon-vias (TSVs) penetrating between the first surface and the second surface and electrically connecting the first and second connection pads to each other and an optical portion disposed on the first surface of the IC for an image sensor and having a plurality of lens layers; an encapsulant covering at least portions of the second surface of the IC for an image sensor; a redistribution layer disposed on the encapsulant; and vias penetrating through at least portions of the encapsulant and electrically connecting the redistribution layer and the second connection pads to each other.

公开(公告)号：US20190140011A1

公开(公告)日：2019-05-09

申请号：US15962512

申请日：2018-04-25

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Byoung Chan KIM ,  Yong Ho BAEK

IPC: H01L27/146 ,  H01L23/48 ,  H01L23/00

Abstract: The fan-out sensor package includes: a core member having a through-hole; an integrated circuit (IC) for a sensor disposed in the through-hole and having a first surface having a sensor region and first connection pads disposed thereon, a second surface opposing the first surface and having second connection pads disposed thereon, and through-silicon vias (TSVs) penetrating between the first and second surfaces and electrically connecting the first and second connection pads to each other; an encapsulant covering the core member and the second surface of the IC for a sensor and filling at least portions of the through-hole; a redistribution layer disposed on the encapsulant; and vias penetrating through at least portions of the encapsulant and electrically connecting the redistribution layer and the second connection pads to each other.

公开(公告)号：US20190131212A1

公开(公告)日：2019-05-02

申请号：US15943200

申请日：2018-04-02

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Ho BAEK ,  Joo Hwan JUNG ,  Yoo Rim CHA ,  Young Sik HUR ,  Jung Chul GONG

IPC: H01L23/48 ,  H01L23/64 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/481 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/552 ,  H01L23/642 ,  H01L24/06 ,  H01L24/14 ,  H01L24/19 ,  H01L24/20 ,  H01L24/44 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/02379 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24195 ,  H01L2224/96 ,  H01L2924/15174 ,  H01L2924/181 ,  H01L2924/182 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/37001

Abstract: A fan-out semiconductor package module includes: a structure including a wiring member including wiring patterns, one or more first passive components disposed on the wiring member and electrically connected to the wiring pattern, and a first encapsulant encapsulating at least portions of each of the one or more first passive components, and having a first through-hole penetrating through the wiring member and the first encapsulant; a semiconductor chip disposed in the first through-hole of the structure and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; a second encapsulant encapsulating at least portions of the semiconductor chip and filling at least portions of the first through-hole; and a connection member disposed on the structure and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the wiring patterns.

公开(公告)号：US20190058241A1

公开(公告)日：2019-02-21

申请号：US15970307

申请日：2018-05-03

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Won Wook SO ,  Yong Ho BAEK ,  Doo Il KIM ,  Young Sik HUR

IPC: H01Q1/22 ,  H01L21/48 ,  H01L23/00 ,  H01L23/66 ,  H01L23/498 ,  H01Q1/48

Abstract: A fan-out semiconductor package includes: a core member including a plurality of insulating layers and a plurality of wiring layers and having a blind cavity penetrating through a portion of the plurality of insulating layers; a semiconductor chip disposed in the blind cavity; an encapsulant encapsulating at least portions of the core member and an active surface of the semiconductor chip and filling at least portions of the blind cavity; and a connection member disposed on the core member and an active surface of the semiconductor chip and including a redistribution layer connected to the connection pads. The plurality of wiring layers include antenna patterns and ground patterns, the antenna patterns and the ground patterns are disposed on different levels, and the antenna patterns are connected to the connection pads through the redistribution layer.

公开(公告)号：US20190057944A1

公开(公告)日：2019-02-21

申请号：US15958573

申请日：2018-04-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Won Wook SO ,  Yong Ho BAEK ,  Doo Il KIM ,  Young Sik HUR

IPC: H01L23/66 ,  H01Q1/22 ,  H01L23/31 ,  H01L23/00

Abstract: A fan-out semiconductor package includes: a core member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the core member and the semiconductor chip; and a connection member disposed on the core member and an active surface of the semiconductor chip and including a redistribution layer connected to the connection pads. The core member includes a plurality of wiring layers disposed on different levels, a dielectric is disposed between the plurality of wiring layers of the core member, one of the plurality of wiring layers includes an antenna pattern, the other of the plurality of wiring layers includes a ground pattern, and the antenna pattern is connected to the connection pads through the redistribution layer in a signal manner.

公开(公告)号：US20180307890A1

公开(公告)日：2018-10-25

申请号：US15922348

申请日：2018-03-15

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Min Keun KIM ,  Young Sik HUR ,  Yong Ho BAEK ,  Tae Hee HAN

IPC: G06K9/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: G06K9/00053 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49816 ,  H01L2224/73204 ,  H05K1/185 ,  H05K2201/10 ,  H05K2201/10151

Abstract: A fan-out fingerprint sensor package includes a first connection member having a through-hole, a fingerprint sensor disposed in the through-hole, an encapsulant encapsulating at least portions of the first connection member and the fingerprint sensor, and a second connection member disposed on the first connection member and an active surface of the fingerprint sensor. The first connection member includes a distribution layer. The second connection member includes a first insulating layer disposed on the distribution layer and the active surface, a redistribution layer disposed on the first insulating layer, a first via connecting the redistribution layer to a connection pad of the fingerprint sensor, and a second via connecting the redistribution layer to the distribution layer. The first via passes through the first insulating layer and at least a portion of the encapsulant, and the second via passes through the first insulating layer.

公开(公告)号：US20180182691A1

公开(公告)日：2018-06-28

申请号：US15647961

申请日：2017-07-12

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jung Hyun CHO ,  Yong Ho BAEK ,  Jun Oh HWANG ,  Joo Hwan JUNG ,  Moon Hee YI

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L23/522 ,  H01L23/367

CPC classification number: H01L23/49503 ,  H01L23/3107 ,  H01L23/3677 ,  H01L23/5226 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24195 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15172 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.