Electronic device including thermal diffusion member

    公开(公告)号:US12284794B2

    公开(公告)日:2025-04-22

    申请号:US18359208

    申请日:2023-07-26

    Abstract: An electronic device including a thermal diffusion member for reducing hot spots is provided. The electronic device includes a plurality of display driver integrated circuits (DDICs) spaced apart from each other in a non-display area of a display panel, and disposed oriented in a first direction from the display panel, a circuit board disposed in a second direction opposite to the first direction from the display panel, and including a timing controller IC (T-CON IC) disposed so as to overlap at least some of the plurality of DDICs when the display panel is viewed from the first direction, a flexible circuit board disposed at one end of the display panel, and electrically connecting the plurality of DDICs and the circuit board, and a thermal diffusion member disposed, between the circuit board and the display panel.

    System device, and method for memory interface including reconfigurable channel

    公开(公告)号:US11556279B2

    公开(公告)日:2023-01-17

    申请号:US17209790

    申请日:2021-03-23

    Inventor: Youngwook Kim

    Abstract: A method of communicating with a memory device through a plurality of sub-channels and a control sub-channel includes; setting a first mode or a second mode. In the first mode, writing or reading first data corresponding to a command synchronized to the control sub-channel through the plurality of sub-channels, and in the second mode, independently writing or reading second data and third data respectively corresponding to different commands synchronized to the control sub-channel through the plurality of sub-channels.

    STORAGE DEVICE COMMUNICATING WITH SPECIFIC PATTERN AND OPERATING METHOD THEREOF
    14.
    发明申请
    STORAGE DEVICE COMMUNICATING WITH SPECIFIC PATTERN AND OPERATING METHOD THEREOF 审中-公开
    存储设备与特定模式通信及其操作方法

    公开(公告)号:US20160239220A1

    公开(公告)日:2016-08-18

    申请号:US14994168

    申请日:2016-01-13

    Abstract: A storage device includes a memory device configured to store data and a memory controller connected to the memory device through a data strobe line and a plurality of data lines. The storage device adds a predetermined specific pattern in front of data and processes data input following the specific pattern as valid data during a read or write operation. The specific pattern is provided in alignment with a data strobe signal (DQS) latency cycle. The memory controller detects a specific pattern input from the memory device during a read operation and processes data input following the specific pattern as valid data when the detected specific pattern matches an internally stored specific pattern.

    Abstract translation: 存储装置包括被配置为存储数据的存储器件和通过数据选通线和多条数据线连接到存储器件的存储器控​​制器。 存储装置在数据前面增加预定的特定模式,并且在读取或写入操作期间将跟随特定模式输入的数据作为有效数据进行处理。 提供特定模式与数据选通信号(DQS)延迟周期对齐。 存储器控制器在读取操作期间检测来自存储器件的特定模式输入,并且当检测到的特定模式与内部存储的特定模式匹配时,将特定模式之后的数据输入作为有效数据进行处理。

    Wafer storage system
    17.
    发明授权

    公开(公告)号:US12103772B2

    公开(公告)日:2024-10-01

    申请号:US17847542

    申请日:2022-06-23

    CPC classification number: B65G1/0478 B65G49/063 B65G2201/0297

    Abstract: A wafer storage system includes a main rail, an overhead hoist transport (OHT) on the main rail, the OHT being configured to transfer at least one storage case with wafers, an interface port on at least one side of the main rail, an auxiliary rail on one side of the interface port, the auxiliary rail being parallel to the main rail, and the interface port being between the main rail and the auxiliary rail, an auxiliary transport on the auxiliary rail, the auxiliary transport being configured to move along the auxiliary rail and to move the at least one storage case, a storage shelf on at least one side of the auxiliary transport, the storage shelf being configured to store the at least one storage case, and a worktable on one side of the storage shelf, the storage shelf being between the worktable and the auxiliary transport.

    Multicore electronic device and packet processing method thereof

    公开(公告)号:US11758023B2

    公开(公告)日:2023-09-12

    申请号:US16823512

    申请日:2020-03-19

    CPC classification number: H04L69/12 G06F9/5061 G06F18/23 H04L49/90 H04L67/146

    Abstract: A multicore electronic device is provided. The multicore electronic device includes a multicore including a plurality of cores, each core being configured to process packets in a driver core layer, a network processing core layer, and an application core layer, and a memory configured to store executions instructions for causing a first core of the plurality of cores to, when the packets are received, identify a location of a driver core for delivering the packets to an operating system domain, a location of an application core for processing the packets in a user domain, and a processing amount, determine a location of a network processing core for processing the packets based on at least one of the location of the driver core, the location of the application core, and the processing amount of the session, and control the network processing core to perform network stack processing on the packets.

    Storage devices configured to support multiple hosts and operation methods thereof

    公开(公告)号:US11360917B2

    公开(公告)日:2022-06-14

    申请号:US17124899

    申请日:2020-12-17

    Abstract: An operation method of a storage device configured to implement physical functions respectively corresponding to hosts includes receiving performance information from each of the host devices, setting a performance level of each of the physical functions to a first level, processing a command from a first host through a corresponding first physical function, changing a performance level of the first physical function to a second level based on the performance information and a performance serviced to the first host, and processing a second command from a second host through at least one second physical function corresponding to the second host prior to processing a subsequent first command from the first host, through the first physical function, based on a performance level of the at least one second physical function being the first level and the performance level of the first physical function being the second level.

Patent Agency Ranking