公开(公告)号：US20140320479A1

公开(公告)日：2014-10-30

申请号：US14345458

申请日：2012-09-20

申请人： Sharp Kabushiki Kaisha

发明人： Seiji Kaneko ,  Kaoru Yamamoto ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G02F1/133 ,  G09G3/36

CPC分类号： G02F1/13306 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2310/04 ,  G09G2320/0285 ,  G09G2320/0673 ,  G09G2340/0435

摘要： At the time of partial drive, the levels of voltages applied to data lines SL1 to SLn are switched according to a rewrite frequency set for each region of a display screen. For example, in a still-image display region with a relatively low rewrite frequency, the levels of the voltages applied to the data lines SL1 to SLn are set to be higher than those for a moving-image display region with a relatively high rewrite frequency. By this, the same effect as that obtained when a counter voltage is switched according to the rewrite frequency can be obtained. Thus, flicker occurring in each region of the display screen can be suppressed.

摘要翻译： 在部分驱动时，根据为显示屏幕的每个区域设置的重写频率切换施加到数据线SL1至SLn的电压电平。 例如，在具有相对低的重写频率的静止图像显示区域中，施加到数据线SL1至SLn的电压的电平被设置为高于具有相对高的重写频率的运动图像显示区域的电平 。 由此，可以获得与根据重写频率切换对置电压时获得的效果相同的效果。 因此，可以抑制在显示屏幕的每个区域中出现的闪烁。

公开(公告)号：US11961473B2

公开(公告)日：2024-04-16

申请号：US18034137

申请日：2020-11-27

申请人： SHARP KABUSHIKI KAISHA

发明人： Seiichi Uchida

IPC分类号： G09G3/3233 ,  H10K59/131

CPC分类号： G09G3/3233 ,  H10K59/131 ,  G09G2300/0452 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/041

摘要： A display device includes a pixel, wherein the pixel has a driving transistor, a monitoring transistor connected to the driving transistor, and a resistor provided in the pixel, and having one end connected between the driving transistor and the monitoring transistor, and the display device is capable of detecting a temperature of the pixel in accordance with a value of current that flows through the resistor and the monitoring transistor.

公开(公告)号：US11887541B2

公开(公告)日：2024-01-30

申请号：US18017906

申请日：2020-08-03

申请人： Sharp Kabushiki Kaisha

发明人： Seiichi Uchida

IPC分类号： G09G3/3233 ,  G09G3/3266

CPC分类号： G09G3/3233 ,  G09G3/3266 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0202 ,  G09G2310/08 ,  G09G2320/0626 ,  G09G2330/021

摘要： A display device includes: a plurality of scanning lines; a plurality of data lines; a plurality of light-emission control lines; a plurality of pixel circuits each including a light-emitting element; a scanning line drive circuit that drives the scanning lines based on a first clock signal; a data line drive circuit that drives the data lines; a light-emission control line drive circuit that drives the light-emission control lines based on a second clock signal; and a display control circuit that outputs at least the first and second clock signals. The display control circuit classifies a frame period into a scanning period and a pause period, and during the pause period, the display control circuit stops the first clock signal and makes a frequency of the second clock signal lower than that during the scanning period. This further reduces the power consumption of the display device that performs low-frequency driving.

公开(公告)号：US10768496B2

公开(公告)日：2020-09-08

申请号：US15779103

申请日：2017-02-17

申请人： Sharp Kabushiki Kaisha

发明人： Seiichi Uchida ,  Kuniaki Okada ,  Naoki Ueda ,  Takahiro Sasaki

IPC分类号： G02F1/1368 ,  G09F9/30 ,  G02F1/1333 ,  G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1335 ,  H01L23/532 ,  H01L29/08 ,  H01L29/423

摘要： An array board 11b includes a gate line 19, a TFT 17, a pixel electrode 18, a display pixel PX, and a second interlayer insulation film 27. The TFT 17 includes a gate electrode 17a formed from a part of the gate line 19, a channel section 17d formed from an oxide semiconductor film 24, a source section 17b connected to one end of the channel section 17d, and a drain section 17c connected to another end of the channel section 17d and formed from the oxide semiconductor film 24 having resistance lower than the channel section 17d. The pixel electrode 18 is connected to the drain section 17c. The display pixel PX includes the TFT 17 and the pixel electrode 18. The second interlayer insulation film 27 has a second hole in a position overlapping the pixel electrode and the drain section 17c and not overlapping the gate electrode 17a.

公开(公告)号：US10386670B2

公开(公告)日：2019-08-20

申请号：US15539888

申请日：2015-12-11

申请人： Sharp Kabushiki Kaisha

发明人： Seiichi Uchida ,  Kuniaki Okada ,  Naoki Ueda

IPC分类号： G02F1/1335 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  G02F1/1362

摘要： A first substrate of a display device includes a TFT provided for each pixel and including an oxide semiconductor layer. A second substrate includes a color filter layer and a light blocking layer. At least one of a first, second and third color filter included in the color filter layer has an average transmittance of 0.2% or less for visible light having a wavelength of 450 nm or less. In pixels provided with color filters having an average transmittance of 0.2% or less for visible light having a wavelength of 450 nm or less, the light blocking layer (a) includes a TFT shading portion extending along a channel length direction and having a width that is less than or equal to a length of the oxide semiconductor layer along a channel width direction; (b) includes a TFT shading portion extending along the channel width direction and having a width that is less than or equal to the length of the oxide semiconductor layer along the channel length direction; or (c) includes no TFT shading portion.

公开(公告)号：US10243083B2

公开(公告)日：2019-03-26

申请号：US15778270

申请日：2016-11-14

申请人： Sharp Kabushiki Kaisha

发明人： Seiichi Uchida ,  Kuniaki Okada

IPC分类号： H01L29/66 ,  H01L29/786 ,  G02F1/1343 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/28 ,  H01L29/41 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/24

摘要： A semiconductor device (1001) includes: a thin film transistor (101) including an oxide semiconductor layer (16) including a channel region, and a source contact region and a drain contact region arranged on opposite sides of the channel region; an insulating layer arranged so as to cover the oxide semiconductor layer (16), the insulating layer having a contact hole (CH) through which the drain contact region is exposed; and a transparent electrode (24) to be in contact with the drain contact region in the contact hole (CH), wherein: as seen from a direction normal to the substrate, at least a part R of the drain contact region overlaps a gate electrode (12); and on an arbitrary cross section that extends in a channel width direction across the at least part (R) of the drain contact region, a width of the oxide semiconductor layer (16) is greater than a width of the gate electrode (12), and the gate electrode (12) is covered by the oxide semiconductor layer (16) with the gate insulating layer therebetween.

公开(公告)号：US09520097B2

公开(公告)日：2016-12-13

申请号：US14351613

申请日：2012-10-31

申请人： Sharp Kabushiki Kaisha

发明人： Yutaka Takamaru ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Seiichi Uchida ,  Noriaki Yamaguchi ,  Shigeyasu Mori

IPC分类号： G09G3/36 ,  G09G3/34

CPC分类号： G09G3/3648 ,  G09G3/3406 ,  G09G3/3614 ,  G09G2310/0237 ,  G09G2320/0247 ,  G09G2320/0626 ,  G09G2360/16

摘要： In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set.

摘要翻译： 在显示装置的显示控制电路（200）中，图像图案检测部（230）检测图像是否为防闪烁图案，并且当其为防闪烁图案时，驱动背光源（ 通常，使得其亮度相对于将发生的亮度变化在相反相位变化），基于预定值，预测值来补偿将发生的亮度变化。 此外，在扫描期间背光源未被接通。 结果，在设置了扫描期间和扫描停止期间的显示装置中，可以减少或消除由于电流泄漏等引起的闪烁。

公开(公告)号：US09379250B2

公开(公告)日：2016-06-28

申请号：US14408626

申请日：2013-06-12

申请人： Sharp Kabushiki Kaisha

发明人： Seiichi Uchida ,  Yasuyuki Ogawa ,  Tadayoshi Miyamoto ,  Kazuatsu Ito ,  Yutaka Takamaru ,  Makoto Nakazawa ,  Mitsunobu Miyamoto

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L21/441 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66 ,  H01L21/02

CPC分类号： H01L29/7869 ,  H01L21/02565 ,  H01L21/441 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78606

摘要： This semiconductor device (100A) includes: a substrate (2); a gate electrode (3) formed on the substrate (2); a gate insulating layer (4) formed over the gate electrode (3); an oxide semiconductor layer (5) formed on the gate insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); a first transparent electrode (7) electrically connected to the drain electrode (6d); an interlayer insulating layer (8a) including portions formed on the source and drain electrodes (6s, 6d); and a second transparent electrode (9) formed on the interlayer insulating layer (8a). At least a portion of the second transparent electrode (9) overlaps with the first transparent electrode (7) with the interlayer insulating layer (8a) interposed between them. And the oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of a same oxide film.

摘要翻译： 该半导体器件（100A）包括：衬底（2）; 形成在所述基板（2）上的栅极（3）; 形成在所述栅电极（3）上方的栅极绝缘层（4）; 形成在栅极绝缘层（4）上的氧化物半导体层（5）; 电连接到氧化物半导体层（5）的源极和漏极（6s，6d）; 电连接到漏极（6d）的第一透明电极（7）; 包括形成在源极和漏极（6s，6d）上的部分的层间绝缘层（8a）; 和形成在层间绝缘层（8a）上的第二透明电极（9）。 第二透明电极（9）的至少一部分与第一透明电极（7）重叠，层间绝缘层（8a）介于它们之间。 并且氧化物半导体层（5）和第一透明电极（7）由相同的氧化膜形成。

公开(公告)号：US20150123117A1

公开(公告)日：2015-05-07

申请号：US14400592

申请日：2013-04-26

申请人： Sharp Kabushiki Kaisha

发明人： Kazuatsu Ito ,  Tadayoshi Miyamoto ,  Yasuyuki Ogawa ,  Seiichi Uchida

IPC分类号： H01L29/786 ,  H01L21/441 ,  H01L29/66

CPC分类号： H01L29/7869 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136231 ,  H01L21/441 ,  H01L27/1222 ,  H01L27/1225 ,  H01L29/4908 ,  H01L29/66969

摘要： A TFT substrate (100A) includes an oxide layer (15) which has a semiconductor region (5) and a conductor region (7) and in which the semiconductor region overlaps at least partially with a gate electrode (3a) with a first insulating layer (4) interposed between them, a protective layer (8) which covers the channel region of the semiconductor region, and a transparent electrode (9) which is arranged to overlap with at least a portion of the conductor region when viewed along a normal to the substrate (2). An end portion of the oxide layer is at least partially covered with the protective layer.

摘要翻译： TFT基板（100A）包括具有半导体区域（5）和导体区域（7）的氧化物层（15），其中半导体区域至少部分地与栅电极（3a）重叠，第一绝缘层 （4），覆盖半导体区域的沟道区域的保护层（8）和透明电极（9），该透明电极设置成与沿着导电区域的法线方向观察时的导体区域的至少一部分重叠 基板（2）。 氧化物层的端部至少部分被保护层覆盖。

公开(公告)号：US10082715B2

公开(公告)日：2018-09-25

申请号：US15501396

申请日：2015-07-29

申请人： Sharp Kabushiki Kaisha

发明人： Kuniaki Okada ,  Seiichi Uchida

IPC分类号： G02F1/136 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/1362

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  G02F1/133707 ,  G02F1/134363 ,  G02F1/1362 ,  G02F1/136227 ,  G02F2001/134318 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2202/16

摘要： A conductive element includes: a first conductive film; a second conductive film connected to the first conductive film; a first insulating film covering the first conductive film and disposed in a layer below the second conductive film, the first insulating film having a contact hole exposing at least an edge face of the first conductive film and thereby connecting the second conductive film to the first conductive film; a second insulating film disposed in a layer above the second insulating film so as to straddle the contact hole; and a third conductive film disposed in a layer above the second conductive film with the second insulating film between the second and third conductive films, the third conductive film having a conductive film opening that contains a location overlapping the edge face of the first conductive film in a plan view.