公开(公告)号：US09977606B2

公开(公告)日：2018-05-22

申请号：US15292481

申请日：2016-10-13

Applicant: SK hynix Inc.

Inventor： Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Yong-Woo Lee ,  Jae-Jin Lee ,  Hoe-Kwon Jung

IPC: G06F3/06 ,  G06F12/0831 ,  G06F13/42

CPC classification number: G06F3/0611 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0831 ,  G06F13/4282 ,  G06F2212/621

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US09977605B2

公开(公告)日：2018-05-22

申请号：US15292314

申请日：2016-10-13

Applicant: SK hynix Inc.

Inventor： Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hoe-Kwon Jung

IPC: G06F3/06 ,  G06F12/0802

CPC classification number: G06F3/0611 ,  G06F3/0622 ,  G06F3/0626 ,  G06F3/0659 ,  G06F3/0685 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0802 ,  G06F13/00 ,  G06F2212/60 ,  G06F2212/7202 ,  G06F2212/7203

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US10466909B2

公开(公告)日：2019-11-05

申请号：US15294320

申请日：2016-10-14

Applicant: SK hynix Inc.

Inventor： Chang-Hyun Kim ,  Min-Chang Kim ,  Do-Yun Lee ,  Yong-Woo Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/40 ,  G06F13/42

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access data storage memory through the first and second memory devices.

公开(公告)号：US09990283B2

公开(公告)日：2018-06-05

申请号：US15291834

申请日：2016-10-12

Applicant: SK hynix Inc.

Inventor： Do-Yun Lee ,  Min-Chang Kim ,  Chang-Hyun Kim ,  Yong-Woo Lee ,  Jae-Jin Lee ,  Hoe-Kwon Jung

IPC: G06F12/06 ,  G06F13/00 ,  G06F9/00

CPC classification number: G06F12/0638 ,  G06F9/00 ,  G06F13/00 ,  G06F2212/205

Abstract: A memory system includes: a first memory device including a plurality of first memories and a first memory controller suitable for controlling the plurality of first memories to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US09595309B2

公开(公告)日：2017-03-14

申请号：US14997775

申请日：2016-01-18

Applicant: SK hynix Inc.

Inventor： Chang-Hyun Kim ,  Min-Chang Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G11C8/00 ,  G11C8/08 ,  G11C8/12 ,  G11C8/10 ,  G11C11/4076

CPC classification number: G11C8/08 ,  G11C7/04 ,  G11C8/00 ,  G11C8/10 ,  G11C8/12 ,  G11C11/4076 ,  G11C29/021 ,  G11C29/028

Abstract: A semiconductor memory device includes a plurality of memory cells coupled to multiple word lines a word line deactivation voltage generation block suitable for generating word line deactivation voltages having different voltage levels corresponding to temperature ranges, and a word line driving block suitable for driving a word line to be deactivated with the word line deactivation voltages selected from the word line deactivation voltages.

Abstract translation: 半导体存储器件包括耦合到多个字线的多个存储器单元，适用于生成具有与温度范围相对应的不同电压电平的字线去激活电压的字线去激活电压产生块，以及适于驱动字线的字线驱动块 用从字线去激活电压中选择的字线去激活电压来停用。

公开(公告)号：US08923081B2

公开(公告)日：2014-12-30

申请号：US13830166

申请日：2013-03-14

Applicant: SK hynix Inc.

Inventor： Chun-Seok Jeong ,  Jae-Jin Lee

IPC: G11C7/00

CPC classification number: G11C7/00 ,  G06F13/1684 ,  Y02D10/14

Abstract: A semiconductor memory system configured to exchange signals through channels may include a memory control device configured to have a plurality of channels, a plurality of memory devices configured to be connected to each of the plurality of channels, wherein the plurality of channels share at least one of the plurality of memory devices.

Abstract translation: 配置成通过信道交换信号的半导体存储器系统可以包括被配置为具有多个信道的存储器控​​制设备，被配置为连接到多个信道中的每一个的多个存储器设备，其中多个信道共享至少一个 的多个存储器件。