公开(公告)号：US20190181181A1

公开(公告)日：2019-06-13

申请号：US15992316

申请日：2018-05-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji Hye YEON ,  Sung Hyun SIM ,  Ha Nul YOO ,  Dong Gun LEE

IPC: H01L27/15 ,  H01L33/00 ,  H01L33/50 ,  H01L33/46 ,  H01L33/56 ,  H01L33/58 ,  H01L33/22

CPC classification number: H01L27/156 ,  H01L25/167 ,  H01L33/0079 ,  H01L33/22 ,  H01L33/46 ,  H01L33/505 ,  H01L33/56 ,  H01L33/58 ,  H01L33/62 ,  H01L33/641 ,  H01L2933/0025 ,  H01L2933/0041 ,  H01L2933/005 ,  H01L2933/0058 ,  H01L2933/0075 ,  H01L2933/0091

Abstract: A method of fabricating a light emitting device package including forming a cell array that includes semiconductor light-emitters including first and second conductivity-type semiconductor layers and an active layer on a substrate, and a separation region, the cell array having a first surface contacting the substrate; exposing the first surface of the separation region by removing the substrate; forming a seed layer on the first surface in the separation region; forming a photoresist pattern on the light-emitters such that the photoresist pattern exposes the seed layer; forming a partition structure that separates the light-emitters by plating a region exposed by the photoresist pattern; forming light emitting windows of the partition structure by removing the photoresist pattern such that the light-emitters are exposed at lower ends of the light emitting windows; and forming wavelength converters by filling the light emitting windows with a wavelength conversion material.

公开(公告)号：US20170125631A1

公开(公告)日：2017-05-04

申请号：US15235464

申请日：2016-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Sub LEE ,  Jung Sub KIM ,  Han Kyu SEONG ,  Soon Jo KWON ,  Ji Hye YEON ,  Dong Gun LEE

IPC: H01L33/06 ,  H01L33/54 ,  H01L33/14 ,  H01L33/62 ,  H01L33/32 ,  H01L33/00

Abstract: A semiconductor light emitting device includes a first conductivity-type semiconductor layer; an active layer disposed on the first conductivity-type semiconductor layer, and including: a plurality of quantum barrier layers; and a plurality of quantum well layers containing indium (In), the plurality of quantum barrier layers and the plurality of quantum well layers being alternately stacked on each other, the plurality of quantum well layers comprising a first quantum well layer and a second quantum well layer; and a second conductivity-type semiconductor layer disposed on the active layer, wherein the first quantum well layer is disposed closer to the first conductivity-type semiconductor layer than the second quantum well layer, wherein the second quantum well layer is disposed closer to the second conductivity-type semiconductor layer than the first quantum well layer, wherein a thickness of the second quantum well layer is greater than a thickness of the first quantum well layer, and wherein each of the first and the second quantum well layers comprises at least one graded layer having a varying amount of In composition, and the at least one graded layer of the second quantum well layer has a greater thickness than the at least one graded layer of the first quantum well layer.