公开(公告)号：US11888016B2

公开(公告)日：2024-01-30

申请号：US17555977

申请日：2021-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghyun Jo ,  Jaeho Lee ,  Eunkyu Lee ,  Seongjun Park ,  Kiyoung Lee ,  Jinseong Heo

IPC: H01L27/146 ,  H01L31/0264 ,  B82Y15/00 ,  H01L31/074

CPC classification number: H01L27/14667 ,  H01L27/14636 ,  H01L31/0264 ,  H01L31/074 ,  B82Y15/00

Abstract: Example embodiments relate to an image sensor configured to achieve a high photoelectric conversion efficiency and a low dark current. The image sensor includes first and second electrodes, a plurality of photodetection layers provided between the first and second electrodes, and an interlayer provided between the photodetection layers. The photodetection layers convert incident light into an electrical signal and include a semiconductor material. The interlayer includes a metallic or semi metallic material having anisotropy in electrical conductivity.

公开(公告)号：US20240014315A1

公开(公告)日：2024-01-11

申请号：US18157416

申请日：2023-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook Shin ,  Changhyun Kim ,  Kyung-Eun Byun ,  Eunkyu Lee

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/16 ,  H01L29/417

CPC classification number: H01L29/7813 ,  H01L29/4236 ,  H01L29/1606 ,  H01L29/41741

Abstract: A semiconductor device may include a substrate including a source region and a drain region in a trench, a gate insulating layer in the trench, and a gate electrode in the trench. The gate electrode may include a lower filling portion and an upper filling portion surrounded by the gate insulating layer. The lower filling portion may include a first conductive layer surrounded by the gate insulating layer and may fill a lower region of the trench. The upper filling portion may include a second conductive layer surrounded by the gate insulating layer and may fill an upper region of the trench. The first conductive layer may include graphene doped with metal.

公开(公告)号：US20230247824A1

公开(公告)日：2023-08-03

申请号：US18298230

申请日：2023-04-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HUIJUNG KIM ,  Minwoo Kwon ,  Sangyeon Han ,  Sangwon Kim ,  Junsoo Kim ,  Hyeonjin Shin ,  Eunkyu Lee

IPC: H01L29/94 ,  H01L29/423 ,  H01L29/78

CPC classification number: H10B12/34 ,  H10B12/315 ,  H10B12/053 ,  H01L29/42356 ,  H01L29/4236 ,  H01L29/7813

Abstract: A semiconductor device includes a substrate including an active region, a gate structure disposed in a gate trench in the substrate, a bit line disposed on the substrate and electrically connected to the active region on one side of the gate structure, and a capacitor disposed on the bit line and electrically connected to the active region on another side of the gate structure. The gate structure includes a gate dielectric layer disposed on bottom and inner side surfaces of the gate trench, a conductive layer disposed on the gate dielectric layer in a lower portion of the gate trench, sidewall insulating layers disposed on the gate dielectric layer, on an upper surface of the conductive layer, a graphene conductive layer disposed on the conductive layer, and a buried insulating layer disposed between the sidewall insulating layers on the graphene conductive layer.

公开(公告)号：US11626282B2

公开(公告)日：2023-04-11

申请号：US16678115

申请日：2019-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunkyu Lee ,  Kyung-Eun Byun ,  Hyunjae Song ,  Hyeonjin Shin ,  Changhyun Kim ,  Keunwook Shin ,  Changseok Lee ,  Alum Jung

IPC: H01L21/02 ,  H01L29/16 ,  H01L29/165

Abstract: Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.

公开(公告)号：US11405725B2

公开(公告)日：2022-08-02

申请号：US16635260

申请日：2018-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwoo Park ,  Eunkyu Lee ,  Wonbae Lim ,  Eujin Ha ,  Sunmoek Jung ,  Meeryung Choi

IPC: G06F16/44 ,  G06F3/01 ,  G06F3/14 ,  H04R5/033 ,  G06F3/04847 ,  H04M3/56 ,  H04R1/10

Abstract: Various embodiments provide an electronic device and a method, the device comprising: an audio module; a display; a connection terminal connected to earphones; a communication interface; and a processor electrically connected to the audio module, the display, the connection terminal, or the communication interface, wherein the processor is set to display execution screens associated with a first application and a second application through a multi-window, respectively, and output an audio signal corresponding to the first application and an audio signal corresponding to the second application to a left terminal or a right terminal of the earphones separately based on a window position corresponding to each execution screen. In addition, other embodiments are also possible.

公开(公告)号：US11069619B2

公开(公告)日：2021-07-20

申请号：US16238208

申请日：2019-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunggeol Nam ,  Hyeonjin Shin ,  Keunwook Shin ,  Changhyun Kim ,  Kyung-Eun Byun ,  Hyunjae Song ,  Eunkyu Lee ,  Changseok Lee ,  Alum Jung ,  Yeonchoo Cho

IPC: H01L23/532 ,  H01L23/528 ,  H01L23/522

Abstract: An interconnect structure and an electronic device including the interconnect structure are disclosed. The interconnect structure may include a metal interconnect having a bottom surface and two opposite side surfaces surrounded by a dielectric layer, a graphene layer on the metal interconnect, and a metal bonding layer providing interface adhesion between the metal interconnect and the graphene layer. The metal bonding layer includes a metal material.

公开(公告)号：US10074737B2

公开(公告)日：2018-09-11

申请号：US14932392

申请日：2015-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho Lee ,  Kiyoung Lee ,  Sangyeob Lee ,  Eunkyu Lee ,  Jinseong Heo ,  Seongjun Park

IPC: H01L23/00 ,  H01L29/778 ,  H01L29/66 ,  H01L29/16

CPC classification number: H01L29/778 ,  H01L29/1606 ,  H01L29/66045 ,  H01L29/66477 ,  H01L29/78603 ,  H01L29/78684 ,  H01L51/0541

Abstract: A method of manufacturing a flexible device including a two-dimensional (2D) material, e.g., graphene, includes forming a dielectric layer on a first substrate, forming a two-dimensional (2D) material layer on the dielectric layer; forming a pattern in the 2D material layer, forming a second substrate on the dielectric layer and the 2D material layer, the first substrate including a flexible material, removing the first substrate, and forming a source electrode, a drain electrode, and a gate electrode on the dielectric layer.

公开(公告)号：US20180197956A1

公开(公告)日：2018-07-12

申请号：US15825344

申请日：2017-11-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho LEE ,  Hyeonjin Shin ,  Dongwook Lee ,  Seongjun Park ,  Kiyoung Lee ,  Eunkyu Lee ,  Sanghyun Jo ,  Jinseong Heo

IPC: H01L29/16 ,  H01L31/0352 ,  H01L27/146 ,  H01L27/15 ,  H01L27/144 ,  H01L29/12

Abstract: Provided are an optical sensor including graphene quantum dots and an image sensor including an optical sensing layer. The optical sensor may include a graphene quantum dot layer that includes a plurality of first graphene quantum dots bonded to a first functional group and a plurality of second graphene quantum dots bonded to a second functional group that is different from the first functional group. An absorption wavelength band of the optical sensor may be adjusted based on types of functional groups bonded to the respective graphene quantum dots and/or sizes of the graphene quantum dots.

公开(公告)号：US12191392B2

公开(公告)日：2025-01-07

申请号：US17505955

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Van Luan Nguyen ,  Minsu Seol ,  Eunkyu Lee ,  Junyoung Kwon ,  Hyeonjin Shin ,  Minseok Yoo

IPC: H01L29/786 ,  H01L29/16 ,  H01L29/24

Abstract: A semiconductor device according to an embodiment may include a substrate, an adhesive layer, and a semiconductor layer. The semiconductor layer includes a 2D material having a layered structure. The adhesive layer is interposed between the substrate and the semiconductor layer, and has adhesiveness to a 2D material.

公开(公告)号：US11975971B2

公开(公告)日：2024-05-07

申请号：US17190852

申请日：2021-03-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon Kim ,  Kyung-Eun Byun ,  Hyeonjin Shin ,  Eunkyu Lee ,  Changseok Lee

IPC: B32B9/00 ,  C01B32/186 ,  B82Y30/00

CPC classification number: C01B32/186 ,  B82Y30/00 ,  Y10T428/30

Abstract: A graphene manufacturing apparatus includes a reaction chamber a substrate supporter configured to structurally support a substrate inside the reaction chamber; a plasma generator configured to generate a plasma inside the reaction chamber; a first gas supply configured to supply an inert gas into the reaction chamber at a first height from an upper surface of the substrate supporter in a height direction of the reaction chamber; a second gas supply configured to supply a carbon source into the reaction chamber at a second height from the upper surface of the substrate supporter in the height direction of the reaction chamber; and a third gas supply configured to supply a reducing gas into the reaction chamber, wherein the first to third gas supply units are disposed at different heights at a third height from the upper surface of the substrate supporter in the height direction of the reaction chamber.