公开(公告)号：US12002882B2

公开(公告)日：2024-06-04

申请号：US18157478

申请日：2023-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun Lee ,  Minsu Seol ,  Yeonchoo Cho ,  Hyeonjin Shin

IPC: H01L29/778 ,  H01L27/092 ,  H01L29/24 ,  H01L29/417 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/7788 ,  H01L27/092 ,  H01L29/24 ,  H01L29/41741 ,  H01L29/7831 ,  H01L29/78642

Abstract: A vertical type transistor includes: a substrate; a first source/drain electrode layer provided on the substrate; a second source/drain electrode layer provided above the first source/drain electrode layer; a first gate electrode layer provided between the first and second source/drain electrode layers; a first gate insulating film passing through the first gate electrode layer; a hole passing through the second source/drain electrode layer, the first gate insulating film, and the first source/drain electrode layer; and a first channel layer provided on a lateral side of the hole, wherein the first channel layer may include a 2D semiconductor.

公开(公告)号：US11961898B2

公开(公告)日：2024-04-16

申请号：US17546303

申请日：2021-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Van Luan Nguyen ,  Minsu Seol ,  Junyoung Kwon ,  Hyeonjin Shin ,  Minseok Yoo ,  Yeonchoo Cho

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/304 ,  H01L21/463

CPC classification number: H01L29/66045 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02527 ,  H01L21/02568 ,  H01L21/304 ,  H01L21/463 ,  H01L29/66969

Abstract: A method of patterning a 2D material layer is includes selectively forming a first material layer on a surface of a substrate to form a first region in which the first material layer covers the surface of the substrate and to further form a second region in which the surface of the substrate is exposed from the first material layer, the first material layer having a strong adhesive force with a 2D material. The method further includes forming a 2D material layer is formed in both the first region and the second region. The method further includes selectively removing the 2D material layer from the second region based on using a physical removal method, such that the 2D material layer remains in the first region.

公开(公告)号：US11708633B2

公开(公告)日：2023-07-25

申请号：US16861614

申请日：2020-04-29

Applicant: Samsung Electronics Co., Ltd. ,  RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY

Inventor： Kyung-Eun Byun ,  Hyoungsub Kim ,  Taejin Park ,  Hyeonjin Shin ,  Hoijoon Kim ,  Wonsik Ahn ,  Mirine Leem

IPC: C23C16/30 ,  B22F7/00 ,  C23C16/46 ,  C23C16/448 ,  C23C16/455 ,  H01L21/02 ,  H01L21/285 ,  H01L31/032

CPC classification number: C23C16/305 ,  B22F7/008 ,  C23C16/448 ,  C23C16/45502 ,  C23C16/45514 ,  C23C16/46 ,  H01L21/02568 ,  H01L21/02581 ,  H01L21/28568 ,  H01L31/0324 ,  B22F2207/01 ,  B22F2302/45

Abstract: Provided are a metal chalcogenide thin film and a method and device for manufacturing the same. The metal chalcogenide thin film includes a transition metal element and a chalcogen element, and at least one of the transition metal element and the chalcogen element having a composition gradient along the surface of the metal chalcogenide thin film, the composition gradient being an in-plane composition gradient. The metal chalcogenide thin film may be prepared by using a manufacturing method including providing a transition metal precursor and a chalcogen precursor on a substrate by using a confined reaction space in such a manner that at least one of the transition metal precursor and the chalcogen precursor forms a concentration gradient according to a position on the surface of the substrate; and heat-treating the substrate.

公开(公告)号：US11600774B2

公开(公告)日：2023-03-07

申请号：US17094121

申请日：2020-11-10

Applicant: Samsung Electronics Co., Ltd. ,  President and Fellows Of Harvard College

Inventor： Minhyun Lee ,  Houk Jang ,  Donhee Ham ,  Chengye Liu ,  Henry Julian Hinton ,  Haeryong Kim ,  Hyeonjin Shin

IPC: H01L45/00 ,  H01L27/24

Abstract: A nonvolatile memory device includes a resistance switching layer, a gate on the resistance switching layer, a gate oxide layer between the resistance switching layer and the gate, and a source and a drain, spaced apart from each other, on the resistance switching layer. A resistance value of the resistance switching layer is changed based on an illumination of light irradiated onto the resistance switching layer and is maintained as a changed resistance value.

公开(公告)号：US11588034B2

公开(公告)日：2023-02-21

申请号：US17060696

申请日：2020-10-01

Applicant: Samsung Electronics Co., Ltd. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Minhyun Lee ,  Minsu Seol ,  Ho Won Jang ,  Yeonchoo Cho ,  Hyeonjin Shin

IPC: H01L29/423 ,  H01L29/04 ,  H01L29/06 ,  H01L29/16 ,  H01L29/66

Abstract: Provided is a field effect transistor including a gate insulating layer having a two-dimensional material. The field effect transistor may include a first channel layer; a second channel layer disposed on the first channel layer; a gate insulating layer disposed on the second channel layer; a gate electrode disposed on the gate insulating layer; a first electrode electrically connected to the first channel layer; and a second electrode electrically connected to the second channel layer. Here, the gate insulating layer may include an insulative, high-k, two-dimensional material.

公开(公告)号：US11572278B2

公开(公告)日：2023-02-07

申请号：US16675350

申请日：2019-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin Shin ,  Keunwook Shin ,  Changhyun Kim ,  Seunggeol Nam ,  Kyung-Eun Byun ,  Hyunjae Song ,  Eunkyu Lee ,  Changseok Lee ,  Alum Jung ,  Yeonchoo Cho

IPC: B32B9/00 ,  C01B32/186 ,  B82Y30/00

Abstract: A method of growing graphene includes forming a carbon monolayer on a substrate by injecting a first reaction gas into a reaction chamber, wherein the first reaction gas includes a first source including a component that is a carbon source and belongs to an electron withdrawing group, and injecting a second reaction gas including a second source into the reaction chamber, wherein the second source includes a functional group that forms a volatile structure by reacting with a component that belongs to an electron withdrawing group. Graphene may be directly grown on a surface of the substrate by repeatedly injecting the first reaction gas and the second reaction gas.

公开(公告)号：US11563116B2

公开(公告)日：2023-01-24

申请号：US17201485

申请日：2021-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun Lee ,  Minsu Seol ,  Yeonchoo Cho ,  Hyeonjin Shin

IPC: H01L29/778 ,  H01L29/24 ,  H01L29/786 ,  H01L29/417 ,  H01L27/092 ,  H01L29/78

Abstract: A vertical type transistor includes: a substrate; a first source/drain electrode layer provided on the substrate; a second source/drain electrode layer provided above the first source/drain electrode layer; a first gate electrode layer provided between the first and second source/drain electrode layers; a first gate insulating film passing through the first gate electrode layer; a hole passing through the second source/drain electrode layer, the first gate insulating film, and the first source/drain electrode layer; and a first channel layer provided on a lateral side of the hole, wherein the first channel layer may include a 2D semiconductor.

公开(公告)号：US11508814B2

公开(公告)日：2022-11-22

申请号：US17111965

申请日：2020-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun Lee ,  Minsu Seol ,  Hyeonjin Shin

IPC: H01L29/10 ,  H01L29/36 ,  H01L29/423

Abstract: A transistor including at least one two-dimensional (2D) channel is disclosed. A transistor according to some example embodiments includes first to third electrodes separated from each other, and a channel layer that is in contact with the first and second electrodes, parallel to the third electrode, and includes at least one 2D channel. The at least one 2D channel includes at least two regions having different doping concentrations. A transistor according to some example embodiments includes: first to third electrodes separated from each other; a 2D channel layer that is in contact with the first and second electrodes and parallel to the third electrode; a first doping layer disposed under the 2D channel layer corresponding to the first electrode; and a second doping layer disposed under the 2D channel layer corresponding to the second electrode, wherein the first and second doping layers contact the 2D channel layer.

公开(公告)号：US11417790B2

公开(公告)日：2022-08-16

申请号：US15942659

申请日：2018-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghyun Jo ,  Jaeho Lee ,  Haeryong Kim ,  Hyeonjin Shin

IPC: H01L21/76 ,  H01L23/48 ,  H01L31/107 ,  H01L31/02 ,  H01L31/0224 ,  H01L31/0352 ,  H01S5/0687 ,  G01S7/481 ,  H01L31/028 ,  H01L31/032 ,  H01L27/146 ,  H01L31/101 ,  H01L27/30 ,  G01S17/931 ,  H01L31/0304 ,  H01L31/0296 ,  H01L31/0312 ,  H01L31/0256 ,  G05D1/02

Abstract: A photodetector having a small form factor and having high detection efficiency with respect to both visible light and infrared rays may include a first electrode, a collector layer on the first electrode, a tunnel barrier layer on the collector layer, a graphene layer on the tunnel barrier layer, an emitter layer on the graphene layer, and a second electrode on the emitter layer. The photodetector may be included in an image sensor. An image sensor may include a substrate, an insulating layer on the substrate, and a plurality of photodetectors on the insulating layer. The photodetectors may be aligned with each other in a direction extending parallel or perpendicular to a top surface of the insulating layer. The photodetector may be included in a LiDAR system.

公开(公告)号：US11329223B2

公开(公告)日：2022-05-10

申请号：US17060884

申请日：2020-10-01

Applicant: Samsung Electronics Co., Ltd. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Minhyun Lee ,  Seongjun Park ,  Hyunjae Song ,  Hyeonjin Shin ,  Kibum Kim ,  Sanghun Lee ,  Yunho Kang

IPC: H01L45/00 ,  H01L21/768 ,  G11C13/00

Abstract: A nonvolatile memory apparatus includes a first electrode, a second electrode separated from the first electrode, a resistive-change material layer provided between the first electrode and the second electrode and configured to store information due to a resistance change caused by an electrical signal applied through the first electrode and the second electrode, and a diffusion prevention layer provided between the first electrode and the resistive-change material layer and/or between the second electrode and the resistive-change material layer and including a two-dimensional (2D) material having a monolayer thickness of about 0.35 nm or less.