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11.发明授权Nonvolatile memory device, program method thereof, and storage device including the same 有权非易失性存储器件，其程序方法和包括该非易失性存储器件的存储器件公开(公告)号：US09378826B2
公开(公告)日：2016-06-28
申请号：US14695866
申请日：2015-04-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ji-Sang Lee
CPC classification number: G11C16/10 , G11C11/5621 , G11C11/5642 , G11C16/0483 , G11C16/24 , G11C16/3427
Abstract: A nonvolatile memory device includes memory cells stacked in a direction perpendicular to a substrate and further includes a first memory cell string connected between a selected bit line and a selected string selection line, a second memory cell string connected between the selected bit line and an unselected string selection line, and a third memory cell string connected to an unselected bit line. During a bit line setup section of a program operation, a ground voltage is provided to the selected bit line and a power supply voltage provided to the unselected string selection line is changed to the ground voltage.
Abstract translation: 非易失性存储器件包括沿垂直于衬底的方向堆叠的存储器单元，并且还包括连接在所选位线和所选择的串选择线之间的第一存储单元串，连接在所选位线和未选择位线之间的第二存储单元串 串选择线，以及连接到未选位线的第三存储单元串。 在编程操作的位线设置部分期间，将地电压提供给所选择的位线，并且提供给未选择的串选择线的电源电压被改变为接地电压。
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公开(公告)号：US08976599B2
公开(公告)日：2015-03-10
申请号：US13872379
申请日：2013-04-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ji-Sang Lee
CPC classification number: G11C16/04 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/26 , G11C16/28 , G11C16/3454 , G11C2211/5621
Abstract: A method of programming a nonvolatile memory device comprises programming target memory cells among a plurality of memory cells connected to a wordline, performing a first sensing operation on the plurality of memory cells, and selectively performing a second sensing operation on the target memory cells based on a result of the first sensing operation.
Abstract translation: 一种对非易失性存储器件进行编程的方法包括在连接到字线的多个存储器单元中编程目标存储器单元，对所述多个存储器单元执行第一感测操作，并且基于所述目标存储器单元选择性地对所述目标存储器单元执行第二感测操作 这是第一感测操作的结果。
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公开(公告)号：US12230329B2
公开(公告)日：2025-02-18
申请号：US17953003
申请日：2022-09-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eunhyang Park , Joonsuc Jang , Se Hwan Park , Ji-Sang Lee
Abstract: A flash memory device includes a memory cell array connected with word lines and control logic that performs threshold voltage compensation on the word lines through a data recover read operation. When a word line on which programming is performed after a selected word line is a dummy word line, the control logic performs the threshold voltage compensation on the selected word line based on a result of a data recover read operation of a word line on which programming is performed before the selected word line. When a next word line on which programming is performed after a selected word line is a dummy word line, the control logic performs threshold voltage compensation on the selected word line based on a result of performing the data recover read operation on a previous word line on which programming is performed before the selected word line.
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公开(公告)号：US10910077B2
公开(公告)日：2021-02-02
申请号：US16561570
申请日：2019-09-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ji-Sang Lee , Ji-Ho Cho , Byung-Soo Kim , Dong-Jin Shin
Abstract: An operation method of a nonvolatile memory device for programming memory cells connected to a selected word line, the method including: performing a program operation; suspending the program operation after performing a first portion of the program operation; and resuming the program operation to perform a second portion of the program operation, wherein the program operation is resumed within a reference time after the program operation is suspended.
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公开(公告)号：US20190392910A1
公开(公告)日：2019-12-26
申请号：US16561570
申请日：2019-09-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ji-Sang Lee , Ji-Ho Cho , Byung-Soo Kim , Dong-Jin Shin
Abstract: An operation method of a nonvolatile memory device for programming memory cells connected to a selected word line, the method including: performing a program operation; suspending the program operation after performing a first portion of the program operation; and resuming the program operation to perform a second portion of the program operation, wherein the program operation is resumed within a reference time after the program operation is suspended.
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Patent Agency Ranking
公开(公告)号：US10304549B2
公开(公告)日：2019-05-28
申请号：US15639459
申请日：2017-06-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ji-Sang Lee
Abstract: A nonvolatile memory device may include a memory cell array and a control logic. The memory cell array has a plurality of memory cells connected to a plurality of word lines. The control logic controls, in a transition process from a verification step to a bit line setup step for a program operation of the plurality of memory cells, an application of a recovery voltage to a word line among the plurality of word lines. The recovery voltage applied to the word line is different from a recovery voltage applied to other word lines.
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公开(公告)号：US10102910B2
公开(公告)日：2018-10-16
申请号：US15806543
申请日：2017-11-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ji-Sang Lee , Donghun Kwak , Daeseok Byeon , Chiweon Yoon
Abstract: A nonvolatile memory includes a memory cell array, a row decoder circuit, and a page buffer circuit. The row decoder circuit applies a turn-on voltage to string selection lines, which are connected to string selection transistors of a selected memory block, at a first precharge operation in response to a write command received from an external device. The page buffer circuit applies, in response to the write command, a first voltage to bit lines, which are connected to the string selection transistors, through a first precharge circuit at the first precharge operation regardless of loaded data and applies the first voltage and a second voltage to the bit lines through a second precharge circuit at a second precharge operation based on the loaded data. During the first precharge operation, write data is loaded onto the page buffer circuit.
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18.发明授权Nonvolatile memory device and method of writing data in nonvolatile memory device 有权非易失性存储器件和在非易失性存储器件中写入数据的方法公开(公告)号：US09524782B2
公开(公告)日：2016-12-20
申请号：US14554128
申请日：2014-11-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ji-Sang Lee , Ki-Hwan Choi , Oh-Suk Kwon
CPC classification number: G11C16/10 , G11C11/5628 , G11C16/08 , G11C16/3459
Abstract: A nonvolatile memory device, including a first latch unit and a nonvolatile memory cell, and a method of writing data in a nonvolatile memory device are provided. The method includes receiving a first writing command or a second writing command from outside of the nonvolatile memory device, and writing first data stored in the first latch unit in the nonvolatile memory cell in response to the first or second writing command. The first data is retained in the first latch unit until the writing of the first data stored in the first latch unit in the nonvolatile memory cell is completed.
Abstract translation: 提供了包括第一锁存单元和非易失性存储单元的非易失性存储器件以及将数据写入非易失性存储器件的方法。 该方法包括从非易失性存储装置的外部接收第一写入命令或第二写入命令，以及响应于第一或第二写入命令将存储在第一锁存单元中的第一数据写入非易失性存储单元。 第一数据被保留在第一锁存单元中，直到存储在非易失性存储单元中的第一锁存单元中的第一数据的写入完成。
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公开(公告)号：US20250014664A1
公开(公告)日：2025-01-09
申请号：US18677544
申请日：2024-05-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Minji Cho , Hee-Woong Kang , Jin-Young Kim , Se Hwan Park , Ji-Sang Lee , Heewon Lee , Su Chang Jeon
Abstract: Disclosed is a method of operating a storage device which includes a storage controller and a non-volatile memory device. The method includes providing, by the storage controller, the non-volatile memory device with a first request indicating a wordline selection operation of a target memory block, obtaining, by the non-volatile memory device, distribution information of a plurality of wordlines of the target memory block based on the first request, determining, by the non-volatile memory device, a deterioration wordline among the plurality of wordlines based on the distribution information, and providing, by the non-volatile memory device, the storage controller with wordline information indicating the deterioration wordline.
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公开(公告)号：US12165721B2
公开(公告)日：2024-12-10
申请号：US18088046
申请日：2022-12-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kwangho Choi , Jin-Young Kim , Se Hwan Park , Il Han Park , Ji-Sang Lee , Joonsuc Jang
IPC: G11C16/34 , G11C11/56 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/24 , H01L23/00 , H01L25/065 , H01L25/18
Abstract: A nonvolatile memory device includes a memory cell array having cell strings that each includes memory cells stacked on a substrate in a direction perpendicular to the substrate. A row decoder is connected with the memory cells through word lines. The row decoder applies a setting voltage to at least one word line of the word lines and floats the at least one word line during a floating time. A page buffer circuit is connected with the cell strings through bit lines. The page buffer senses voltage changes of the bit lines after the at least one word line is floated during the floating time and outputs a page buffer signal as a sensing result. A counter counts a number of off-cells in response to the page buffer signal. A detecting circuit outputs a detection signal associated with a defect cell based on the number of off-cells.
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