公开(公告)号：US08946773B2

公开(公告)日：2015-02-03

申请号：US13835704

申请日：2013-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-jo Tak ,  Jae-kyun Kim ,  Joo-sung Kim ,  Jun-youn Kim ,  Jae-won Lee ,  Hyo-ji Choi

IPC: H01L29/267 ,  H01L21/02 ,  H01L29/20

CPC classification number: H01L29/267 ,  G11C11/161 ,  H01L21/02104 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/0254 ,  H01L29/2003

Abstract: A semiconductor buffer structure may include a silicon substrate and a buffer layer that is formed on the silicon substrate. The buffer layer may include a first layer, a second layer formed on the first layer, and a third layer formed on the second layer. The first layer may include AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) and have a lattice constant LP1 that is smaller than a lattice constant LP0 of the silicon substrate. The second layer may include AlxInyGa1-x-yN (0≦x

Abstract translation: 半导体缓冲结构可以包括硅衬底和形成在硅衬底上的缓冲层。 缓冲层可以包括第一层，形成在第一层上的第二层和形成在第二层上的第三层。 第一层可以包括比硅衬底的晶格常数LP0小的晶格常数LP1的Al x In y Ga 1-x-y N（0＆n 1; x＆n 1; 1,0＆amp; n 1; y＆n 1 E; 1,0＆ 第二层可以包括Al x In y Ga 1-x-y N（0＆nlE; x <1,0＆lt; nlE; y <1,0＆amp; nlE; x + y <1），并且具有大于晶格常数LP1并且小于晶格的晶格常数LP2 常数LP0。 第三层可以包括Al x In y Ga 1-x-y N（0＆nlE; x <1,0＆lt; nlE; y <1,0＆amp; nlE; x + y <1），并且具有大于晶格常数LP1并且小于晶格的晶格常数LP3 常数LP2。

公开(公告)号：US08871544B2

公开(公告)日：2014-10-28

申请号：US14067185

申请日：2013-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyung-su Jeong ,  Young-soo Park ,  Su-hee Chae ,  Bok-ki Min ,  Jun-youn Kim ,  Hyun-gi Hong ,  Young-jo Tak ,  Jae-won Lee

IPC: H01L21/00 ,  H01L33/00 ,  H01L33/32 ,  H01L27/15 ,  H01L33/38 ,  H01L33/42

CPC classification number: H01L33/0025 ,  H01L27/156 ,  H01L33/32 ,  H01L33/38 ,  H01L33/42

Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.

Abstract translation: 示例性实施例涉及包括图案化发光单元的发光器件和制造发光器件的方法。 发光器件包括在半导体层的顶部上的第一电极和在半导体层的底部上的第二电极，其中半导体层是由多个堆叠形成的图案阵列。 多个堆叠之间的空间填充有绝缘层，并且第一电极在绝缘层上。

公开(公告)号：US08703512B2

公开(公告)日：2014-04-22

申请号：US13950845

申请日：2013-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-won Lee ,  Bok-ki Min ,  Jun-youn Kim ,  Young-jo Tak ,  Hyung-su Jeong

IPC: H01L33/00 ,  H01L21/00

CPC classification number: H01L33/60 ,  H01L33/007 ,  H01L33/10 ,  H01L33/382 ,  H01L33/387 ,  H01L33/405 ,  H01L33/46 ,  H01L2933/0016

Abstract: A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.

Abstract translation: 发光器件可以包括衬底，n型覆盖层，有源层和p型覆盖层。 可以在基板上形成具有多个凹槽和每个凹槽之间的台面的凹凸图案，并且可以在多个凹槽或多个凹槽中的每一个之间的台面的表面上形成反射层 的凹槽。 因此，有源层中产生的光可以被反射层反射，并被提取到外部位置。