Abstract:
A circuit can include a first transistor including a source and a gate; a second transistor including a drain and a gate, wherein the source of the first transistor is coupled to the drain of the second transistor; and a switchable element. In one embodiment, a first current-carrying terminal of the switchable element is coupled to the gate of the first transistor, and a second current-carrying terminal of the switchable element is coupled to the gate of the second transistor. In another embodiment, the switchable element is coupled to the gate of the first transistor and includes a first selectable terminal of the switchable element coupled to a source of the second transistor, and a second selectable terminal of the switchable element coupled to the gate of the second transistor. In a particular embodiment, the circuit can be a cascode circuit
Abstract:
An electronic device can include a low-side HEMT including a segmented gate electrode; and a high-side HEMT coupled to the low-side HEMT, wherein the low-side and high voltage HEMTs are integrated within a same semiconductor die. In another aspect, an electronic device can include a source electrode; a low-side HEMT; a high-side HEMT coupled to the low-side HEMT; and a resistive element. In an embodiment, the resistive element can be coupled to the source electrode and a gate electrode of the high voltage HEMT, and in another embodiment, the resistive element can be coupled to the source electrode and a drain of the low-side HEMT. A process of forming an electronic device can include forming a channel layer over a substrate; and forming a gate electrode over the channel layer. The gate electrode can be a segmented gate electrode of a HEMT.
Abstract:
In one embodiment, a driver circuit is configured to form a Vgs of a transistor as a negative value during a time interval that a second transistor, connected to the first transistor, is being enabled.
Abstract:
In an aspect, a circuit can include a first HEMT, a second HEMT, and a variable capacitor. A drain of the first HEMT can be coupled to a source of the second HEMT. An electrode of the variable capacitor can be coupled to a source of the first HEMT, and another electrode of the variable capacitor can be coupled to a gate of the second HEMT. In another aspect, an electronic device can include a die including a HEMT and a variable capacitor. An electrode of the variable capacitor can be coupled to a source or a gate of the HEMT, and another electrode of the variable capacitor can be coupled to an external terminal of the die. In a further aspect, an electronic device comprising a die, wherein the die includes a variable capacitor, a first diode, and a second diode.
Abstract:
A circuit can comprise a transistor, a sensor, and a switch. The transistor can include a drain electrode, a gate electrode, a source electrode, and a back electrode. The sensor can be configured to detect an error condition in the transistor. The switch can be configured to change a voltage at the back electrode in response to the sensor detecting the error condition in the transistor, the change of the voltage at the back electrode reducing current flow between the drain electrode and the source electrode.
Abstract:
An electronic device can include a temperature sensor. The temperature sensor can include a drain electrode including drain fingers spaced apart from the source fingers; a source electrode including source fingers spaced apart from the drain fingers; and a gate electrode including a runner, gate fingers and a conductive bridge. In an embodiment, the runner includes a first portion and a second portion spaced apart from the first portion, the gate fingers are coupled to the runner and each gate finger is disposed between a pair of the source and drain fingers. The conductive bridge connects at least two gate fingers, wherein the conductive bridge is along a conduction path between the first and second portions of the runner. Designs for the temperature sensor may provide a more accurate temperature measurement reflective of a transistor within the electronic device.
Abstract:
At least one embodiment is directed to a semiconductor edge termination structure, where the edge termination structure comprises several doped layers and a buffer layer.