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公开(公告)号：US10153084B2
公开(公告)日：2018-12-11
申请号：US15398241
申请日：2017-01-04
发明人： Aaron J. Caffee , Brian G. Drost
IPC分类号： H01L23/64 , H01F27/34 , H01F27/28 , H01F41/04 , H01F27/36 , H01L23/50 , H01L49/02 , H01L23/552 , H01L23/58 , H01L23/66
摘要： A technique for forming an integrated circuit including an inductor reduces magnetic coupling between the inductor and surrounding elements. The technique includes deliberate placement of circuit elements (e.g., terminals, pins, routing traces) in locations on the integrated circuit relative to a magnetic vector potential associated with the inductor and relative to a magnetic flux density field associated with the inductor to reduce or eliminate induced signals that degrade system performance.
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公开(公告)号：US20180190424A1
公开(公告)日：2018-07-05
申请号：US15398241
申请日：2017-01-04
发明人： Aaron J. Caffee , Brian G. Drost
IPC分类号： H01F27/34 , H01F27/28 , H01F41/04 , H01F27/36 , H01L23/50 , H01L49/02 , H01L23/552 , H01L23/58
CPC分类号： H01F27/34 , H01F17/0006 , H01F27/2804 , H01F27/365 , H01F41/041 , H01F2017/0073 , H01L23/50 , H01L23/552 , H01L23/585 , H01L23/645 , H01L23/66 , H01L28/10
摘要： A technique for forming an integrated circuit including an inductor reduces magnetic coupling between the inductor and surrounding elements. The technique includes deliberate placement of circuit elements (e.g., terminals, pins, routing traces) in locations on the integrated circuit relative to a magnetic vector potential associated with the inductor and relative to a magnetic flux density field associated with the inductor to reduce or eliminate induced signals that degrade system performance.
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公开(公告)号：US09489000B2
公开(公告)日：2016-11-08
申请号：US14040839
申请日：2013-09-30
发明人： Aaron J. Caffee , Brian G. Drost
CPC分类号： G05F1/575
摘要： Reference signal generators using thermistors are disclosed. An apparatus includes a first device having a first temperature coefficient and a thermistor having a second temperature coefficient having a sign opposite to that of the first temperature coefficient. A circuit maintains equivalence of a first signal and a second signal and offsets a first temperature variation of the first device using a second temperature variation of the thermistor to generate the second signal having a low temperature coefficient. The first device may be a bipolar transistor configured to generate a base-emitter voltage and coupled in series with the thermistor. The first signal may be a first voltage on a first node. The second signal may be a second voltage on a second node. The circuit may be configured to maintain effective equivalence of the first voltage and the second voltage. The apparatus may include a resistor coupled to the second node.
摘要翻译： 公开了使用热敏电阻的参考信号发生器。 一种装置包括具有第一温度系数的第一装置和具有与第一温度系数相反的符号的第二温度系数的热敏电阻。 电路维持第一信号和第二信号的等效，并且利用热敏电阻的第二温度变化来抵消第一装置的第一温度变化，以产生具有低温度系数的第二信号。 第一器件可以是被配置为产生基极 - 发射极电压并与热敏电阻串联耦合的双极晶体管。 第一信号可以是第一节点上的第一电压。 第二信号可以是第二节点上的第二电压。 电路可以被配置为保持第一电压和第二电压的有效等效。 该装置可以包括耦合到第二节点的电阻器。
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公开(公告)号：US09007119B2
公开(公告)日：2015-04-14
申请号：US14137499
申请日：2013-12-20
CPC分类号： H02N1/006 , B81B7/0045 , B81B7/008 , B81B2203/0118 , B81B2207/015 , B81B2207/03 , G01L25/00 , G01P15/097 , G01P15/125 , G01P2015/0831 , H03B5/30 , H03H9/02275 , H03H2009/0248 , H03H2009/02519 , H03L1/022 , H03L7/1976
摘要： A method of operating a system including a MEMS device of an integrated circuit die includes generating an indicator of a device parameter of the MEMS device in a first mode of operating the system using a monitor structure formed using a MEMS structural layer of the integrated circuit die. The method includes generating, using a CMOS device of the integrated circuit die, a signal indicative of the device parameter and based on the indicator. The device parameter may be a geometric dimension of the MEMS device. The method may include, in a second mode of operating the system, compensating for a difference between a value of the signal and a target value of the signal. The method may include re-generating the indicator after exposing the MEMS device to stress and generating a second signal indicating a change in the device parameter.
摘要翻译： 一种操作包括集成电路管芯的MEMS器件的系统的方法包括：在使用由集成电路管芯的MEMS结构层形成的监视器结构的第一模式中，生成MEMS器件的器件参数的指示器 。 该方法包括使用集成电路管芯的CMOS器件产生指示器件参数并基于指示器的信号。 器件参数可以是MEMS器件的几何尺寸。 该方法可以包括在操作系统的第二模式中，补偿信号的值和信号的目标值之间的差异。 该方法可以包括在使MEMS器件暴露于应力之后重新产生指示符，并产生指示器件参数变化的第二信号。
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公开(公告)号：US20140306623A1
公开(公告)日：2014-10-16
申请号：US14137499
申请日：2013-12-20
IPC分类号： H02N1/00
CPC分类号： H02N1/006 , B81B7/0045 , B81B7/008 , B81B2203/0118 , B81B2207/015 , B81B2207/03 , G01L25/00 , G01P15/097 , G01P15/125 , G01P2015/0831 , H03B5/30 , H03H9/02275 , H03H2009/0248 , H03H2009/02519 , H03L1/022 , H03L7/1976
摘要： A method of operating a system including a MEMS device of an integrated circuit die includes generating an indicator of a device parameter of the MEMS device in a first mode of operating the system using a monitor structure formed using a MEMS structural layer of the integrated circuit die. The method includes generating, using a CMOS device of the integrated circuit die, a signal indicative of the device parameter and based on the indicator. The device parameter may be a geometric dimension of the MEMS device. The method may include, in a second mode of operating the system, compensating for a difference between a value of the signal and a target value of the signal. The method may include re-generating the indicator after exposing the MEMS device to stress and generating a second signal indicating a change in the device parameter.
摘要翻译： 一种操作包括集成电路管芯的MEMS器件的系统的方法包括：在使用由集成电路管芯的MEMS结构层形成的监视器结构的第一模式中，生成MEMS器件的器件参数的指示器 。 该方法包括使用集成电路管芯的CMOS器件产生指示器件参数并基于指示器的信号。 器件参数可以是MEMS器件的几何尺寸。 该方法可以包括在操作系统的第二模式中，补偿信号的值和信号的目标值之间的差异。 该方法可以包括在使MEMS器件暴露于应力之后重新产生指示符，并产生指示器件参数变化的第二信号。
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公开(公告)号：US20140266509A1
公开(公告)日：2014-09-18
申请号：US13828066
申请日：2013-03-14
IPC分类号： H03H9/24
CPC分类号： H03H9/2457 , H03B5/30 , H03H9/02259 , H03H9/02275 , H03H9/2431 , H03H2009/02291 , H03H2009/02346 , H03H2009/02496
摘要： An apparatus includes a microelectromechanical system (MEMS) device. The MEMS device includes a resonator suspended from a substrate, an anchor disposed at a center of the resonator, a plurality of suspended beams radiating between the anchor and the resonator, a plurality of first electrodes disposed about the anchor, and a plurality of second electrodes disposed about the anchor. The plurality of first electrodes and the resonator form a first electrostatic transducer. The plurality of second electrodes and the resonator form a second electrostatic transducer. The first electrostatic transducer and the second electrostatic transducer are configured to sustain rotational vibrations of the resonator at a predetermined frequency about an axis through the center of the resonator and orthogonal to a plane of the substrate in response to a signal on the first electrode.
摘要翻译： 一种装置包括微机电系统（MEMS）装置。 MEMS器件包括从衬底悬挂的谐振器，设置在谐振器中心的锚，在锚和谐振器之间辐射的多个悬臂，围绕锚定器设置的多个第一电极和多个第二电极 围绕锚点布置。 多个第一电极和谐振器形成第一静电换能器。 多个第二电极和谐振器形成第二静电换能器。 第一静电换能器和第二静电换能器被配置为响应于第一电极上的信号，以围绕谐振器的中心的轴线以预定的频率维持谐振器的旋转振动并且与基板的平面正交。
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公开(公告)号：US10778230B2
公开(公告)日：2020-09-15
申请号：US16661049
申请日：2019-10-23
发明人： Aaron J. Caffee , Brian G. Drost
摘要： A method for reducing deterministic jitter in a clock generator includes providing a load current through a regulated voltage node to a circuit responsive to a divide ratio. The method includes providing an auxiliary current through the regulated voltage node. The auxiliary current has a first current level during a first period corresponding to a first value of the divide ratio and the auxiliary current has a second current level during a second period corresponding to a second value of the divide ratio.
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公开(公告)号：US20200162079A1
公开(公告)日：2020-05-21
申请号：US16661049
申请日：2019-10-23
发明人： Aaron J. Caffee , Brian G. Drost
摘要： A method for reducing deterministic jitter in a clock generator includes providing a load current through a regulated voltage node to a circuit responsive to a divide ratio. The method includes providing an auxiliary current through the regulated voltage node. The auxiliary current has a first current level during a first period corresponding to a first value of the divide ratio and the auxiliary current has a second current level during a second period corresponding to a second value of the divide ratio.
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公开(公告)号：US10601431B2
公开(公告)日：2020-03-24
申请号：US16022188
申请日：2018-06-28
摘要： A time-to-voltage converter is configured to generate an output voltage signal and a correlated reference voltage signal. The time-to-voltage converter includes a current source configured to generate a bias current through a current source output node. The time-to-voltage converter includes a first switched-capacitor circuit coupled to the current source output node and configured to generate the output voltage signal based on an input time signal and the bias current during a first interval. The time-to-voltage converter includes a second switched-capacitor circuit coupled to the current source output node and configured to generate the correlated reference voltage signal based on a reference time signal and the bias current during a second interval. The first interval and the second interval are non-overlapping intervals.
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20.发明申请公开(公告)号：US20190305783A1
公开(公告)日：2019-10-03
申请号：US15944567
申请日：2018-04-03
发明人： Aaron J. Caffee , Russell Croman , Brian G. Drost
摘要： A clock generator includes an oscillator configured to generate an oscillating signal and a signal path configured to provide an output clock signal based on the oscillating signal. In response to a control signal, the clock generator is configured to neutralize periodic phase perturbations in the oscillating signal using opposing periodic phase perturbations. The neutralization may occur in the signal path. The signal path may be responsive to the control signal to adjust at least one of a duty cycle, a rise time, and a fall time of the output clock signal to cause alternating phase perturbations of the periodic phase perturbations to apply as the opposing periodic phase perturbations in the output clock signal. The neutralization may occur in the oscillator. The clock generator may include an auxiliary path configured to provide an auxiliary signal to the oscillator.
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