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    TWO-DIMENSIONAL CONDENSATION FOR UNIAXIALLY STRAINED SEMICONDUCTOR FINS
    12.
    发明申请
    TWO-DIMENSIONAL CONDENSATION FOR UNIAXIALLY STRAINED SEMICONDUCTOR FINS 有权
    用于非均匀应变半导体FINS的二维冷凝

    公开(公告)号：US20120241818A1

    公开(公告)日：2012-09-27

    申请号：US13488238

    申请日：2012-06-04

    申请人： Jack T. Kavalieros ,  Nancy Zelick ,  Been-Yih Jin ,  Markus Kuhn ,  Stephen M. Cea

    发明人： Jack T. Kavalieros ,  Nancy Zelick ,  Been-Yih Jin ,  Markus Kuhn ,  Stephen M. Cea

    IPC分类号： H01L29/78

    CPC分类号： H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/7842 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7854

    摘要： Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.

    摘要翻译： 公开了用于实现半导体翅片的多面冷凝的技术。 这些技术可以用于例如制造基于鳍的晶体管。 在一个示例的情况下，在体基板上设置应变层。 应变层与取决于应变层的部件的临界厚度相关联，并且应变层具有低于或等于临界厚度的厚度。 在基板和应变层中形成翅片，使得翅片包括基板部分和应变层部分。 将翅片氧化以冷凝翅片的应变层部分，使得应变层中的组分的浓度从预凝结浓度变为较高的缩合后浓度，从而超过临界厚度。

    Two-dimensional condensation for uniaxially strained semiconductor fins
    13.
    发明授权
    Two-dimensional condensation for uniaxially strained semiconductor fins 有权
    用于单轴应变半导体翅片的二维冷凝

    公开(公告)号：US09159835B2

    公开(公告)日：2015-10-13

    申请号：US13488238

    申请日：2012-06-04

    申请人： Jack T. Kavalieros ,  Nancy Zelick ,  Been-Yih Jin ,  Markus Kuhn ,  Stephen M. Cea

    发明人： Jack T. Kavalieros ,  Nancy Zelick ,  Been-Yih Jin ,  Markus Kuhn ,  Stephen M. Cea

    IPC分类号： H01L29/66 ,  H01L29/78

    CPC分类号： H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/7842 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7854

    摘要： Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.

    摘要翻译： 公开了用于实现半导体翅片的多面冷凝的技术。 这些技术可以用于例如制造基于鳍的晶体管。 在一个示例的情况下，在体基板上设置应变层。 应变层与取决于应变层的部件的临界厚度相关联，并且应变层具有低于或等于临界厚度的厚度。 在基板和应变层中形成翅片，使得翅片包括基板部分和应变层部分。 将翅片氧化以冷凝翅片的应变层部分，使得应变层中的组分的浓度从预凝结浓度变为较高的缩合后浓度，从而超过临界厚度。

    Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects
    15.
    发明授权
    Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects 有权
    用于形成用于集成电路互连的金属 - 金属氧化物蚀刻停止/屏障的方法和装置

    公开(公告)号：US07727892B2

    公开(公告)日：2010-06-01

    申请号：US10255930

    申请日：2002-09-25

    申请人： Xiaorong Morrow ,  Jihperng Leu ,  Markus Kuhn ,  Jose A. Maiz

    发明人： Xiaorong Morrow ,  Jihperng Leu ,  Markus Kuhn ,  Jose A. Maiz

    IPC分类号： H01L21/311

    CPC分类号： H01L21/76849 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76855 ,  H01L21/76888 ,  H01L21/76897 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the invention, the method includes depositing a metal layer on the top of a planarized interconnect layer, the interconnect layer having an interlayer dielectric (ILD) with a top that is planar with the top of an electrically conductive interconnect. In one embodiment of the invention, the method includes reacting the metal layer with the ILD to form a metal oxide layer on the top of the ILD. At the same time, the metal layer will not be significantly oxidized by the electrically conductive interconnect, thus forming a metal barrier on the electrically conductive interconnect to improve electromigration performance. The metal barrier and metal oxide layer together comprise a protective layer. A second ILD may be subsequently formed on the protective layer, and the protective layer may act an etch-stop during a subsequent etch of the second ILD.

    摘要翻译： 描述了用于与金属 - 金属氧化物电迁移屏障和蚀刻停止形成互连的方法和装置。 在本发明的一个实施例中，该方法包括在平坦化的互连层的顶部上沉积金属层，所述互连层具有层间电介质（ILD），其顶部与导电互连的顶部是平面的。 在本发明的一个实施方案中，该方法包括使金属层与ILD反应以在ILD的顶部形成金属氧化物层。 同时，金属层不会被导电互连显着地氧化，从而在导电互连上形成金属阻挡层以改善电迁移性能。 金属屏障和金属氧化物层一起包括保护层。 随后可以在保护层上形成第二ILD，并且保护层可以在随后的第二ILD蚀刻期间进行蚀刻停止。