Gas inlets for wafer processing chamber
    11.
    发明授权
    Gas inlets for wafer processing chamber 失效
    晶圆处理室气体入口

    公开(公告)号:US5916369A

    公开(公告)日:1999-06-29

    申请号:US485058

    申请日:1995-06-07

    摘要: A system of supplying processing fluid to a substrate processing apparatus having walls, the inner surfaces of which define a processing chamber in which a substrate supporting susceptor is located. The system consists of a number of fluid storages, each which stores a separate processing fluid, at least two fluid conduits along which processing fluid flows from the fluid storages to the processing apparatus and a fluid inlet which connects the fluid conduits to the processing chamber. The inlet has a separate fluid passage, corresponding to each of the fluid conduits, formed along it. Each fluid passage opens at or near an inner surface of a wall to together define a fluid mixing zone, so that fluid moving along one fluid passage is prevented from mixing with fluid moving along any other passage until reaching the mixing zone.

    摘要翻译: 向具有壁的基板处理装置供给处理流体的系统,其内表面限定了处理室,基板支撑基座位于该处理室中。 该系统由许多流体储存器组成,每个流体存储器存储单独的处理流体,至少两个流体管道,处理流体从该流体流体流过流体储存器至处理装置;以及流体入口,其将流体导管连接到处理室。 入口具有与沿其形成的每个流体管道相对应的单独的流体通道。 每个流体通道在壁的内表面处或附近开口以一起限定流体混合区域,从而防止沿着一个流体通道移动的流体与沿着任何其它通道移动的流体混合直到到达混合区域。

    Method and apparatus for processing the upper and lower faces of a wafer
    13.
    发明授权
    Method and apparatus for processing the upper and lower faces of a wafer 有权
    用于处理晶片的上表面和下表面的方法和设备

    公开(公告)号:US6113703A

    公开(公告)日:2000-09-05

    申请号:US200176

    申请日:1998-11-25

    摘要: A method and apparatus for processing opposing surfaces of a wafer. In one embodiment a semiconductor processing chamber is provided having an opening which allows for insertion of a wafer. A wafer holder is located within the semiconductor processing chamber for receiving the wafer. An inlet port allows flow of gas into the semiconductor processing chamber. An outlet port allows flow of gas from the semiconductor processing chamber. A first heat plate is mounted within the semiconductor processing chamber so that a first face of a wafer, when held by the wafer holder, faces towards the first heat plate. A first heat source is located to heat the first heat plate. A second heat plate is mounted in position within the semiconductor processing chamber so that a second face of the wafer, opposing the first face, faces towards the second heat plate. A second heat source is located to heat the second heat plate.

    摘要翻译: 一种用于处理晶片相对表面的方法和装置。 在一个实施例中,提供了具有允许插入晶片的开口的半导体处理室。 晶片保持器位于半导体处理室内,用于接收晶片。 入口端口允许气体流入半导体处理室。 出口端口允许来自半导体处理室的气体流动。 第一加热板安装在半导体处理室内,使得当由晶片保持器保持时晶片的第一面朝向第一加热板。 位于第一热源以加热第一加热板。 第二加热板安装在半导体处理室内的适当位置,使得与第一面相对的晶片的第二面朝向第二加热板。 位于第二热源以加热第二加热板。

    Method of enhancing step coverage of polysilicon deposits
    14.
    发明授权
    Method of enhancing step coverage of polysilicon deposits 失效
    提高多晶硅沉积层序覆盖的方法

    公开(公告)号:US5695819A

    公开(公告)日:1997-12-09

    申请号:US641703

    申请日:1996-05-02

    IPC分类号: C23C16/24

    CPC分类号: C23C16/24

    摘要: A thermal decomposition CVD method is provided for forming a polysilicon layer over a stepped surface on a semiconductor wafer. The method includes introducing a continuous flow of silicon precursor gases into a vacuum chamber, and adjusting the flow rates and concentrations of the precursor gases, adjusting the temperature and adjusting the pressure within the vacuum chamber so as to control the growth rate of the polysilicon layer on the substrate to between about 500 angstroms/minute and about 2000 angstroms/minute. In a preferred embodiment of the invention, the growth rate of the polysilicon layer is controlled by adjusting the precursor gas flow rates, the temperature and the pressure to between about 1000 angstroms/minute and about 1500 angstroms/minute with the result that the average step coverage of the polysilicon layer is greater than about 95 percent.

    摘要翻译: 提供了用于在半导体晶片上的台阶表面上形成多晶硅层的热分解CVD方法。 该方法包括将连续的硅前体气体流引入真空室,调节前体气体的流速和浓度,调节温度并调节真空室内的压力,以便控制多晶硅层的生长速率 在基底上至约500埃/分钟至约2000埃/分钟。 在本发明的优选实施例中,通过将前体气体流速,温度和压力调节至约1000埃/分钟至约1500埃/分钟来控制多晶硅层的生长速率,结果是平均步长 多晶硅层的覆盖率大于约95%。

    Semiconductor wafer process chamber with suspector back coating
    15.
    发明授权
    Semiconductor wafer process chamber with suspector back coating 失效
    半导体晶圆处理室具有悬挂背面涂层

    公开(公告)号:US5599397A

    公开(公告)日:1997-02-04

    申请号:US625271

    申请日:1996-03-27

    摘要: The present disclosure is directed to an apparatus for depositing a layer of a material on a wafer. The apparatus includes a deposition chamber having an upper dome, a lower dome and a side wall between the upper and lower domes. A susceptor plate is in and extends across the deposition chamber to divide the deposition chamber into an upper portion above the susceptor plate and a lower portion below the susceptor plate. A gas inlet manifold is in the side wall. The manifold has three inlet ports. One of the ports is connected by passages which open into the lower portion of the deposition chamber. The other two ports are connected by passages which open into the upper portion of the deposition chamber. A gas supply system is connected to the inlet ports so as to provide the same gases into the lower portion of the deposition chamber as well as into the upper portion of the deposition chamber. This allows the back surface of the susceptor plate to be coated with a layer of the same material as to be coated on the wafer prior to coating the layer on the wafer.

    摘要翻译: 本公开涉及一种用于在晶片上沉积材料层的装置。 该装置包括具有上圆顶,下圆顶和在上下圆顶之间的侧壁的沉积室。 感受板在沉积室中并且延伸穿过沉积室,以将沉积室分成基座板上方的上部和基座板下方的下部。 气体入口歧管位于侧壁中。 歧管有三个入口。 一个端口通过通向沉积室的下部的通道连接。 其他两个端口通过通向沉积室的上部的通道连接。 气体供给系统连接到入口端口,以便将相同的气体提供到沉积室的下部以及沉积室的上部。 这允许在将晶片上的层涂覆之前,使基座板的背面涂覆有要涂覆在晶片上的相同材料的层。

    Depositing polysilicon films having improved uniformity and apparatus therefor
    16.
    发明授权
    Depositing polysilicon films having improved uniformity and apparatus therefor 失效
    沉积具有改进的均匀性的多晶硅膜及其装置

    公开(公告)号:US06402850B1

    公开(公告)日:2002-06-11

    申请号:US08300111

    申请日:1994-09-02

    IPC分类号: C23C1600

    摘要: A barrier to prevent reactant gases from reaching the surfaces of a susceptor support for a substrate upon which polysilicon films are to be deposited provides improved uniformity of the depositing film across the substrate, and prevents substrate-to-substrate variations during sequential depositions. A suitable barrier includes a preheat ring extension that mates with an extension of the susceptor support.

    摘要翻译: 防止反应物气体到达沉积多晶硅膜的衬底的基座支撑体的表面的屏障提供了沉积薄膜穿过衬底的改进的均匀性,并且防止了在顺序沉积期间的衬底对衬底的变化。 合适的屏障包括与基座支撑件的延伸部分配合的预热环延伸部。

    Susceptor for deposition apparatus
    17.
    发明授权
    Susceptor for deposition apparatus 失效
    沉积装置的受体

    公开(公告)号:US5645646A

    公开(公告)日:1997-07-08

    申请号:US752742

    申请日:1996-11-14

    IPC分类号: H01L21/687 C23C16/00

    CPC分类号: H01L21/6875 H01L21/68735

    摘要: An apparatus for depositing a material on a wafer includes a susceptor plate mounted in a deposition chamber. The chamber has a gas inlet and a gas exhaust. Means are provided for heating the susceptor plate. The susceptor plate has a plurality of support posts projecting from its top surface. The support posts are arranged to support a wafer thereon with the back surface of the wafer being spaced from the surface of the susceptor plate. The support posts are of a length so that the wafer is spaced from the susceptor plate a distance sufficient to allow deposition gas to flow and/or diffuse between the wafer and the susceptor plate, but still allow heat transfer from the susceptor plate to the wafer mainly by conduction. The susceptor plate is also provided with means, such as retaining pins or a recess, to prevent lateral movement of a wafer seated on the support posts.

    摘要翻译: 用于在晶片上沉积材料的设备包括安装在沉积室中的基座板。 该室具有气体入口和排气。 提供用于加热感受板的装置。 基座板具有从其顶表面突出的多个支撑柱。 支撑柱布置成在其上支撑晶片,其中晶片的后表面与基座板的表面间隔开。 支撑柱具有长度,使得晶片与基座板间隔足以允许沉积气体在晶片和基座板之间流动和/或扩散的距离,但仍允许从基座板到晶片的热传递 主要是通过传导。 基座板还设置有诸如保持销或凹部的装置,以防止位于支撑柱上的晶片的横向移动。

    Semiconductor wafer process chamber with susceptor back coating
    18.
    发明授权
    Semiconductor wafer process chamber with susceptor back coating 失效
    半导体晶圆处理室,带底座背面涂层

    公开(公告)号:US5551982A

    公开(公告)日:1996-09-03

    申请号:US221118

    申请日:1994-03-31

    摘要: The present disclosure is directed to an apparatus for depositing a layer of a material on a wafer. The apparatus includes a deposition chamber having an upper dome, a lower dome and a side wall between the upper and lower domes. A susceptor plate is in and extends across the deposition chamber to divide the deposition chamber into an upper portion above the susceptor plate and a lower portion below the susceptor plate. A gas inlet manifold is in the side wall. The manifold has three inlet ports. One of the ports is connected by passages which open into the lower portion of the deposition chamber. The other two ports are connected by passages which open into the upper portion of the deposition chamber. A gas supply system is connected to the inlet ports so as to provide the same gases into the lower portion of the deposition chamber as well as into the upper portion of the deposition chamber. This allows the back surface of the susceptor plate to be coated with a layer of the same material as to be coated on the wafer prior to coating the layer on the wafer.

    摘要翻译: 本公开涉及一种用于在晶片上沉积材料层的装置。 该装置包括具有上圆顶,下圆顶和在上下圆顶之间的侧壁的沉积室。 感受板在沉积室中并且延伸穿过沉积室,以将沉积室分成基座板上方的上部和基座板下方的下部。 气体入口歧管位于侧壁中。 歧管有三个入口。 一个端口通过通向沉积室的下部的通道连接。 其他两个端口通过通向沉积室的上部的通道连接。 气体供给系统连接到入口端口,以便将相同的气体提供到沉积室的下部以及沉积室的上部。 这允许在将晶片上的层涂覆之前,使基座板的背面涂覆有要涂覆在晶片上的相同材料的层。

    Method for the fabrication of low leakage polysilicon thin film
transistors
    19.
    发明授权
    Method for the fabrication of low leakage polysilicon thin film transistors 失效
    低渗多晶硅薄膜晶体管的制备方法

    公开(公告)号:US5112764A

    公开(公告)日:1992-05-12

    申请号:US578106

    申请日:1990-09-04

    摘要: A method of manufacturing a thin film transistor having a low leakage current including depositing a layer of silicon oxide on a semiconductor substrate or on a layer of silicon nitrate deposited on a glass substrate, depositing a polysilicon layer, at a temperature of 520.degree.-570.degree. C., on the silicon oxide layer, annealing this polysilicon layer in a nitrogen atmosphere at a temperature of less than 650.degree. C., forming islands in this polysilicon layer, forming a gate oxide layer on one of the islands by oxidizing the island under high pressure at a temperature below 650.degree. C., forming a gate from a heavily doped polysilicon layer deposited on the gate oxide layer, forming lightly doped source and drain areas laterally adjacent to the gate, providing a thin layer of silicon oxide on the gate and the source and drain access, heavily doping areas of the first silicon layer adjacent to the source and drain areas, annealing the source and drain areas at a temperature below 650.degree. C. and hydrogenating the resistive transistor with a hydrogen plasma.