Abstract:
The disclosure relates to a mask for use in X-ray lithography wherein a window is provided for X-rays, a pattern being placed over the window which absorbs the X-rays along the pattern, thereby providing a mask to the X-rays in accordance with the pattern and causing the X-rays to strike a mask on a device at all points except where the X-rays have been masked. Photoresist systems which are responsive to X-rays are well known, these including polymethylmethacrylate. The mask is formed from a thin layer of silicon carbide with a ring of material supporting the silicon carbide, preferably silicon. The desired pattern is then formed on the silicon carbide, using a material which absorbs Xrays, such as gold. The mask is formed by utilizing a starting substrate such as silicon and depositing a thin layer of silicon carbide thereon. The silicon is then etched down to the silicon carbide at all points except for the perimeter of the silicon carbide or in segments such as quadrants to provide a support for the silicon carbide. The silicon carbide is thin and acts as a window to Xrays. An X-ray absorbing mask is then formed on the silicon carbide window to provide the final X-ray lithograph mask.
Abstract:
An integrated circuit structure having a plurality of monocrystalline semiconductor islands separated by a layer of dielectric insulation is fabricated by a method which begins with the formation of a plurality of nucleation sites upon a supported layer of insulating material. A single crystallite of semiconductor material is then vapor deposited at each of the nucleation sites. The crystallites are then covered by the vapor deposition of a second layer of dielectric material. The second layer of dielectric material is then supported by the deposition of a substrate material, followed by removal of the original supporting body to expose the first layer of insulating material, thereby providing a plurality of electrically isolated regions of single crystallite semiconductor material embedded in a suitable substrate. The structure is then completed by forming and interconnecting desired circuit components within the single crystallites.
Abstract:
THIS SPECIFICATION DISCLOSES A METHOD OF FABRICATING AN INTEGRATED CIRCUIT CHARACTERIZED BY ELECTRONIC COMPONENTS BEING FORMED IN A POLYCRYSTALLINE SEMICONDUCTOR, SUCH AS
SILICON OR GERMANIUM, DEPOSITED AT LESS THAN 900*C. AND AT A RATE OF LESS THAN ONE MICRON PER MINUTE AND OVERLYING AN ISOLATION LAYER COVERING COMPONENTS FORMED IN A BASE REGION OF MONOCRYSTALLINE SEMICONDUCTOR MATERIAL. THE COMPONENTS IN THE POLYCRYSTALLINE SEMICONDUCTOR MAY EMPLOY JUNCTIONS AND MAY BE ACTIVE OR PASSIVE. MORE THAN ONE LAYER OF POLYCRYUSTALLINE SEMICONDUCTOR AND MORE THAN ONE ISOLATION LAYER MAY BE EMPLOYED.