公开(公告)号：US10962711B2

公开(公告)日：2021-03-30

申请号：US16569673

申请日：2019-09-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chieh Chang ,  Chung-Hao Tsai ,  Chen-Hua Yu ,  Chuei-Tang Wang

IPC: G02B6/12 ,  G02B6/13

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a photonic die, an encapsulant and a wave guide structure. The photonic die includes a substrate and a dielectric layer. The substrate has a wave guide pattern. The dielectric layer is disposed over the substrate. The photonic die is encapsulated by the encapsulant. The wave guide structure spans over the front side of the photonic die and a top surface of the encapsulant, and penetrates the dielectric layer to be optically coupled with the wave guide pattern.

公开(公告)号：US20250157889A1

公开(公告)日：2025-05-15

申请号：US18582326

申请日：2024-02-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chieh Chang ,  Chih Hsin Yang ,  Mao-Nan Wang ,  Kuan-Hsun Wang ,  Yang-Hsin Shih ,  Yun-Sheng Li ,  Liang-Wei Wang ,  Dian-Hau Chen

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31

Abstract: A method includes forming a first device die comprising forming an integrated circuit on a semiconductor substrate; and forming an interconnect structure on the semiconductor substrate. The interconnect structure has a plurality of metal layers. The method further includes bonding a second device die to the first device die, and forming gap-fill regions surrounding the second device die. In a first formation process, a first TSV is formed to penetrate through the semiconductor substrate, wherein the first TSV has a first width. In a second formation process, a second TSV is formed to penetrate through the semiconductor substrate. The second TSV has a second width different from the first width.

公开(公告)号：US11830864B2

公开(公告)日：2023-11-28

申请号：US18182477

申请日：2023-03-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chieh Chang ,  Chung-Hao Tsai ,  Chuei-Tang Wang ,  Hsing-Kuo Hsia ,  Chen-Hua Yu

IPC: H01L25/16 ,  H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/31 ,  H01L21/56 ,  G02B6/12 ,  G02B6/122

CPC classification number: H01L25/167 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  G02B6/12004 ,  G02B6/1225 ,  H01L21/565 ,  H01L23/3157 ,  H01L23/5283 ,  H01L2224/0231 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/0401

Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.

公开(公告)号：US11446785B2

公开(公告)日：2022-09-20

申请号：US16584874

申请日：2019-09-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Chieh Chang ,  Yen-Ting Chen ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: B24B53/017 ,  B24B37/20

Abstract: Provided herein are chemical-mechanical planarization (CMP) systems and methods to reduce metal particle pollution on dressing disks and polishing pads. Such methods may include contacting a dressing disk and at least one conductive element with an electrolyte solution and applying direct current (DC) power to the dressing disk and the at least one conductive element.

公开(公告)号：US11362077B2

公开(公告)日：2022-06-14

申请号：US17181279

申请日：2021-02-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chieh Chang ,  Chung-Hao Tsai ,  Chuei-Tang Wang ,  Hsing-Kuo Hsia ,  Chen-Hua Yu

IPC: H01L25/16 ,  H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L23/31 ,  H01L21/56 ,  G02B6/12 ,  G02B6/122

Abstract: A method includes forming multiple photonic devices in a semiconductor wafer, forming a v-shaped groove in a first side of the semiconductor wafer, forming an opening extending through the semiconductor wafer, forming multiple conductive features within the opening, wherein the conductive features extend from the first side of the semiconductor wafer to a second side of the semiconductor wafer, forming a polymer material over the v-shaped groove, depositing a molding material within the opening, wherein the multiple conductive features are separated by the molding material, after depositing the molding material, removing the polymer material to expose the v-shaped groove, and placing an optical fiber within the v-shaped groove.

公开(公告)号：US12249542B2

公开(公告)日：2025-03-11

申请号：US18512682

申请日：2023-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hao Kung ,  Chih-Chieh Chang ,  Kao-Feng Liao ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/66

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

公开(公告)号：US20240087951A1

公开(公告)日：2024-03-14

申请号：US18512682

申请日：2023-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hao Kung ,  Chih-Chieh Chang ,  Kao-Feng Liao ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/768

CPC classification number: H01L21/76831 ,  H01L21/76814 ,  H01L21/7684 ,  H01L21/76877 ,  H01L29/66795

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

公开(公告)号：US11850704B2

公开(公告)日：2023-12-26

申请号：US17877320

申请日：2022-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chieh Chang ,  Yen-Ting Chen ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: B24B53/017 ,  B24B37/20

CPC classification number: B24B53/017 ,  B24B37/20

Abstract: Provided herein are chemical-mechanical planarization (CMP) systems and methods to reduce metal particle pollution on dressing disks and polishing pads. Such methods may include contacting a dressing disk and at least one conductive element with an electrolyte solution and applying direct current (DC) power to the dressing disk and the at least one conductive element.

公开(公告)号：US20210096310A1

公开(公告)日：2021-04-01

申请号：US16882773

申请日：2020-05-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chieh Chang ,  Chung-Hao Tsai ,  Chen-Hua Yu ,  Chuei-Tang Wang

IPC: G02B6/42 ,  H01L25/16 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A package assembly and a manufacturing method thereof are provided. The package assembly includes a first package component and an optical signal port disposed aside the first package component. The first package component includes a first die including an electronic integrated circuit, a first insulating encapsulation laterally covering the first die, a redistribution structure disposed on the first die and the first insulating encapsulation, and a second die including a photonic integrated circuit and electrically coupled to the first die through the redistribution structure. The optical signal port is optically coupled to an edge facet of the second die of the first package component.

公开(公告)号：US10947414B2

公开(公告)日：2021-03-16

申请号：US16503255

申请日：2019-07-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fang-I Chih ,  Chih-Chieh Chang ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: C09G1/02 ,  B24B37/20 ,  C09G1/04 ,  H01L21/306 ,  H01L21/321

Abstract: A polishing composition for a chemical mechanical polishing process includes abrasive particles, at least one chemical additive, and a non-aqueous solvent.