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公开(公告)号:US10079178B1
公开(公告)日:2018-09-18
申请号:US15461846
申请日:2017-03-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Ju Chen , Yi-Wei Chiu , Fang-Yi Wu , Chih-Hao Chen , Wen-Yen Chen
IPC: H01L21/768 , H01L21/033 , H01L21/311 , H01L21/027
Abstract: Formation methods of a semiconductor device structure are provided. The method includes forming a bottom layer, a middle layer and an upper layer over a substrate, developing the upper layer to form an upper pattern with a first opening exposing the middle layer and a sidewall of the upper pattern. The upper pattern has a top surface. The method further includes conformally forming a protective layer over the upper pattern and the exposed middle layer, anisotropically etching the protective layer to leave a portion of the protective layer over the sidewall of the upper pattern and expose the middle layer, etching the middle layer not covered by the upper pattern and the portion of the protective layer to form a middle pattern with a second opening exposing the bottom layer, and etching the bottom layer though the second opening of the middle pattern.
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公开(公告)号:US20240395727A1
公开(公告)日:2024-11-28
申请号:US18790119
申请日:2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/538 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/31 , H01L25/00 , H01L25/065 , H01L25/10
Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.
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公开(公告)号:US20240387372A1
公开(公告)日:2024-11-21
申请号:US18786524
申请日:2024-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yen-Chih Huang , Li-An Sun , Che-En Tsai , Yu-Lin Chiang , Chung Chuan Huang , Chih-Hao Chen
IPC: H01L23/528 , H01L21/768 , H01L23/535
Abstract: A method includes forming a first etch stop layer (ESL) over a conductive feature, forming a first dielectric layer on the first ESL, forming a second ESL on the first dielectric layer, forming a second dielectric layer on the second ESL, forming a trench in the second dielectric layer, forming a first opening in a bottom surface of the trench extending through the second dielectric layer, and forming a second opening in a bottom surface of the first opening. The second opening extends through the first dielectric layer and the first ESL. The second opening exposes a top surface of the conductive feature. The method further includes widening the first opening to a second width, filling the trench with a conductive material to form a conductive line, and filling the second opening and the first opening with the conductive material to form a conductive via.
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公开(公告)号:US20240038623A1
公开(公告)日:2024-02-01
申请号:US17815629
申请日:2022-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ping-Yin Hsieh , Chih-Hao Chen , Yi-Huan Liao , Pu Wang , Li-Hui Cheng
IPC: H01L23/373 , H01L23/367 , H01L23/31 , H01L23/498 , H01L21/48 , H01L21/56
CPC classification number: H01L23/3735 , H01L23/3675 , H01L23/3128 , H01L23/3135 , H01L23/49827 , H01L21/4853 , H01L21/486 , H01L21/4871 , H01L21/563 , H01L21/565
Abstract: In an embodiment, a device includes a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a front-side of the package component. The device also includes a back-side metal layer on a back-side of the package component. The device also includes an indium thermal interface material on a back-side of the back-side metal layer. The device also includes a lid on a back-side of the indium thermal interface material. The device also includes a package substrate connected to the conductive connectors, the lid being adhered to the package substrate.
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公开(公告)号:US11348829B2
公开(公告)日:2022-05-31
申请号:US17098585
申请日:2020-11-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tai-Yen Peng , Wen-Yen Chen , Chih-Hao Chen
IPC: H01L21/768 , H01L21/033 , H01L23/522 , H01L23/528 , H01L21/311
Abstract: Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over a target layer, forming a plurality of spacers over the first mask layer, and forming a second mask layer over the plurality of spacers and patterning the second mask layer to form a first opening, where in a plan view a major axis of the opening extends in a direction that is perpendicular to a major axis of a spacer of the plurality of spacers. The method also includes depositing a sacrificial material in the opening, patterning the sacrificial material, etching the first mask layer using the plurality of spacers and the patterned sacrificial material, etching the target layer using the etched first mask layer to form second openings in the target layer, and filling the second openings in the target layer with a conductive material.
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公开(公告)号:US20220037229A1
公开(公告)日:2022-02-03
申请号:US16941509
申请日:2020-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Chin-Fu Kao , Li-Hui Cheng , Szu-Wei Lu , Chih-Chien Pan
Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die. The TIM is disposed on the first die, the second die, and the underfill layer. The adhesive pattern is disposed between the underfill layer and the TIM to separate the underfill layer from the TIM.
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公开(公告)号:US20210225727A1
公开(公告)日:2021-07-22
申请号:US16745338
申请日:2020-01-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Chin-Fu Kao , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/367 , H01L23/31 , H01L23/00 , H01L21/48 , H01L21/56 , H01L21/683
Abstract: A structure includes a circuit substrate, a device, a metal layer, a lid and a thermal interface material layer. The device is disposed on and electrically connected to the circuit substrate. The device includes at least one semiconductor die laterally encapsulated by an insulating encapsulation. The metal layer is covering a back surface of the at least one semiconductor die and the insulating encapsulation. The lid is disposed on the circuit substrate, and the lid is adhered to the metal layer through the thermal interface material layer
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公开(公告)号:US10852476B2
公开(公告)日:2020-12-01
申请号:US16285234
申请日:2019-02-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Chin-Fu Kao , Li-Hui Cheng , Szu-Wei Lu
Abstract: A semiconductor package includes a photonic integrated circuit, an encapsulating material, and a redistribution structure. The photonic integrated circuit includes a coupling surface, a back surface opposite to the coupling surface and a plurality of optical couplers disposed on the coupling surface and configured to be coupled to a plurality of optical fibers. The encapsulating material encapsulates the photonic integrated circuit and revealing the plurality of optical couplers. The redistribution structure is disposed over the encapsulating material and the back surface of the photonic integrated circuit, wherein the redistribution structure is electrically connected to the photonic integrated circuit.
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公开(公告)号:US20190035638A1
公开(公告)日:2019-01-31
申请号:US15833077
申请日:2017-12-06
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Li Fan , Chih-Hao Chen , Wen-Yen Chen
IPC: H01L21/311 , H01L21/768
CPC classification number: H01L21/31144 , H01L21/0332 , H01L21/0335 , H01L21/0337 , H01L21/0338 , H01L21/76802 , H01L21/76816 , H01L21/76877
Abstract: Methods for patterning in a semiconductor process are described. A dummy layer is formed having a cut therein. A first sacrificial layer is formed over the dummy layer, and at least a portion of the first sacrificial layer is disposed in the cut. A second sacrificial layer is formed over the first sacrificial layer. The second sacrificial layer is patterned to have a first pattern. Using the first pattern of the second sacrificial layer, the first sacrificial layer is patterned to have the first pattern. The second sacrificial layer is removed. Thereafter, a second pattern in the first sacrificial layer is formed comprising altering a dimension of the first pattern of the first sacrificial layer. Using the second pattern of the first sacrificial layer, the dummy layer is patterned. Mask portions are formed along respective sidewalls of the patterned dummy layer. The mask portions are used to form a mask.
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公开(公告)号:US20240371725A1
公开(公告)日:2024-11-07
申请号:US18775879
申请日:2024-07-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Hung-Yu Chen , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/373 , H01L21/48 , H01L23/04 , H01L23/31 , H01L23/40
Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.
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