Formation method of semiconductor device structure using multilayer resist layer

    公开(公告)号:US10079178B1

    公开(公告)日:2018-09-18

    申请号:US15461846

    申请日:2017-03-17

    Abstract: Formation methods of a semiconductor device structure are provided. The method includes forming a bottom layer, a middle layer and an upper layer over a substrate, developing the upper layer to form an upper pattern with a first opening exposing the middle layer and a sidewall of the upper pattern. The upper pattern has a top surface. The method further includes conformally forming a protective layer over the upper pattern and the exposed middle layer, anisotropically etching the protective layer to leave a portion of the protective layer over the sidewall of the upper pattern and expose the middle layer, etching the middle layer not covered by the upper pattern and the portion of the protective layer to form a middle pattern with a second opening exposing the bottom layer, and etching the bottom layer though the second opening of the middle pattern.

    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOF

    公开(公告)号:US20240387372A1

    公开(公告)日:2024-11-21

    申请号:US18786524

    申请日:2024-07-28

    Abstract: A method includes forming a first etch stop layer (ESL) over a conductive feature, forming a first dielectric layer on the first ESL, forming a second ESL on the first dielectric layer, forming a second dielectric layer on the second ESL, forming a trench in the second dielectric layer, forming a first opening in a bottom surface of the trench extending through the second dielectric layer, and forming a second opening in a bottom surface of the first opening. The second opening extends through the first dielectric layer and the first ESL. The second opening exposes a top surface of the conductive feature. The method further includes widening the first opening to a second width, filling the trench with a conductive material to form a conductive line, and filling the second opening and the first opening with the conductive material to form a conductive via.

    Patterning methods for semiconductor devices and structures resulting therefrom

    公开(公告)号:US11348829B2

    公开(公告)日:2022-05-31

    申请号:US17098585

    申请日:2020-11-16

    Abstract: Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over a target layer, forming a plurality of spacers over the first mask layer, and forming a second mask layer over the plurality of spacers and patterning the second mask layer to form a first opening, where in a plan view a major axis of the opening extends in a direction that is perpendicular to a major axis of a spacer of the plurality of spacers. The method also includes depositing a sacrificial material in the opening, patterning the sacrificial material, etching the first mask layer using the plurality of spacers and the patterned sacrificial material, etching the target layer using the etched first mask layer to form second openings in the target layer, and filling the second openings in the target layer with a conductive material.

    MULTIPLE PATTERNING METHOD
    19.
    发明申请

    公开(公告)号:US20190035638A1

    公开(公告)日:2019-01-31

    申请号:US15833077

    申请日:2017-12-06

    Abstract: Methods for patterning in a semiconductor process are described. A dummy layer is formed having a cut therein. A first sacrificial layer is formed over the dummy layer, and at least a portion of the first sacrificial layer is disposed in the cut. A second sacrificial layer is formed over the first sacrificial layer. The second sacrificial layer is patterned to have a first pattern. Using the first pattern of the second sacrificial layer, the first sacrificial layer is patterned to have the first pattern. The second sacrificial layer is removed. Thereafter, a second pattern in the first sacrificial layer is formed comprising altering a dimension of the first pattern of the first sacrificial layer. Using the second pattern of the first sacrificial layer, the dummy layer is patterned. Mask portions are formed along respective sidewalls of the patterned dummy layer. The mask portions are used to form a mask.

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