公开(公告)号：US10535816B2

公开(公告)日：2020-01-14

申请号：US16059777

申请日：2018-08-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Jung-Tang Wu ,  Szu-Ping Tung ,  Szu-Hua Wu ,  Shing-Chyang Pan ,  Meng-Yu Wu

IPC: H01L43/12 ,  H01L27/22 ,  H01L43/02

Abstract: A via structure, a MRAM device using the via structure and a method for fabricating the MRAM device are provided. In the method for fabricating the MRAM device, at first, a first dielectric layer is deposited over a transistor. Then, a contact is formed in the first dielectric layer and electrically connected to the transistor. Thereafter, a metal nitride layer is deposited over the first dielectric layer and the contact. Then, an etch stop layer is deposited over the metal nitride layer. Thereafter, a second dielectric layer is deposited over the etch stop layer. Then, a via structure is formed in the second dielectric layer, the etch stop layer, and the metal nitride layer and landing on the contact. Thereafter, a memory stack is formed over the via structure.

公开(公告)号：US20190333807A1

公开(公告)日：2019-10-31

申请号：US15964306

申请日：2018-04-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Szu-Ping Tung ,  Yu-Kai Lin ,  Jen Hung Wang ,  Shing-Chyang Pan

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/311

Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.

公开(公告)号：US20250070027A1

公开(公告)日：2025-02-27

申请号：US18929920

申请日：2024-10-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Szu-Ping Tung ,  Chih-Chien Chi ,  Hung-Wen Su

IPC: H01L23/532 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.

公开(公告)号：US20210265272A1

公开(公告)日：2021-08-26

申请号：US17315579

申请日：2021-05-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Szu-Ping Tung ,  Chih-Chien Chi ,  Hung-Wen Su

IPC: H01L23/532 ,  H01L21/768 ,  H01L21/02 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.

公开(公告)号：US20200066581A1

公开(公告)日：2020-02-27

申请号：US16672879

申请日：2019-11-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Szu-Ping Tung ,  Yu-Kai Lin ,  Jen Hung Wang ,  Shing-Chyang Pan

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/311

Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.

公开(公告)号：US20180005876A1

公开(公告)日：2018-01-04

申请号：US15197294

申请日：2016-06-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Szu-Ping Tung ,  Jen Hung Wang ,  Shing-Chyang Pan

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device includes a substrate, a first conductive feature over a portion of the substrate, and an etch stop layer over the substrate and the first conductive feature. The etch stop layer includes a silicon-containing dielectric (SCD) layer and a metal-containing dielectric (MCD) layer over the SCD layer. The semiconductor device further includes a dielectric layer over the etch stop layer, and a second conductive feature in the dielectric layer. The second conductive feature penetrates the etch stop layer and electrically connects to the first conductive feature.

公开(公告)号：US20170044668A1

公开(公告)日：2017-02-16

申请号：US15340108

申请日：2016-11-01

Applicant: Taiwan Semiconductor Manufacturing CO., LTD.

Inventor： Chih-Chien Chi ,  Szu-Ping Tung ,  Huang-Yi Huang ,  Ching-Hua Hsieh

IPC: C23C16/50 ,  H01L21/687 ,  H01L21/285 ,  C23C16/06 ,  H01L23/522 ,  H01L23/532 ,  C23C16/44 ,  C23C16/02 ,  H01L21/67 ,  H01L21/768

CPC classification number: C23C16/50 ,  C23C16/02 ,  C23C16/06 ,  C23C16/4401 ,  H01L21/02074 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/67184 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/68707 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76883 ,  H01L23/5226 ,  H01L23/53238

Abstract: Before depositing a metal capping layer on a metal interconnect in a damascene structure, a remote plasma is used to reduce native oxide formed on the metal interconnect. Accordingly, a remote plasma reducing chamber is integrated in a processing platform for depositing a metal capping layer.

Abstract translation: 在镶嵌结构中的金属互连上沉积金属覆盖层之前，使用远程等离子体来减少在金属互连上形成的自然氧化物。 因此，远程等离子体还原室集成在用于沉积金属覆盖层的处理平台中。

公开(公告)号：US09514928B2

公开(公告)日：2016-12-06

申请号：US14155884

申请日：2014-01-15

Applicant: Taiwan Semiconductor Manufacturing CO., LTD.

Inventor： Chih-Chien Chi ,  Chung-Chi Ko ,  Mei-Ling Chen ,  Huang-Yi Huang ,  Szu-Ping Tung ,  Ching-Hua Hsieh

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/02107 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/02271 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76868 ,  Y10T428/24331

Abstract: A selectively repairing process for a barrier layer is provided. A repair layer is formed by chemical vapor deposition using an organosilicon compound as a precursor gas. The precursor gas adsorbed on a low-k dielectric layer exposed by defects in a barrier layer is transformed to a porous silicon oxide layer has a density more than the density of the low-k dielectric layer.

Abstract translation: 提供了一种用于阻挡层的选择性修复方法。 使用有机硅化合物作为前体气体通过化学气相沉积形成修复层。 吸附在由阻挡层中的缺陷暴露的低k电介质层上的前体气体转变为具有比低k电介质层的密度更高的密度的多孔氧化硅层。

公开(公告)号：US20230178379A1

公开(公告)日：2023-06-08

申请号：US17706152

申请日：2022-03-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ssu-Yu Ho ,  Szu-Ping Tung ,  Ching-Yu Chang

IPC: H01L21/47 ,  H01L21/02 ,  H01L21/027

CPC classification number: H01L21/47 ,  H01L21/0274 ,  H01L21/02263

Abstract: Embodiments utilize a photoetching process in forming a patterned target layer. After forming a patterned mandrel layer and spacer layer over the patterned mandrel layer, a bottom layer of a photomask is deposited using a chemical vapor deposition process to form an amorphous carbon film. An upper layer of the photomask is used to pattern the bottom layer to form openings for a reverse material. The reverse material is deposited in the openings of the bottom layer, the bottom layer providing both a mask and template function for the reverse material.

公开(公告)号：US20210280460A1

公开(公告)日：2021-09-09

申请号：US17316063

申请日：2021-05-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Szu-Ping Tung ,  Yu-Kai Lin ,  Jen Hung Wang ,  Shing-Chyang Pan

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/311

Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.